System and method for maintaining high speed communication
Abstract:
A data communication system includes a transmitter, a channel, and a receiver includes a Clock and Data Recovery (CDR) phase detector that is configured to: calculate an overall pulse response of the data communication system; obtain a function value for each of a plurality of phases, the plurality of phases corresponding to a resolution per symbol; set a crossing phase to be a phase at which this value is minimum among the plurality of phase; and set the CDR locking phase to be the crossing phase plus a midpoint from among the plurality of phases.
Public/Granted literature
Information query
Patent Agency Ranking
0/0