The present invention provides a semiconductor memory device and manufacturing method thereof, wherein the semiconductor memory device comprises an active region (101), a plurality of floating gates (103), a plurality of control gates (104), a layer of interlayer insulting film (109) and a plurality of conductive sections (106). The active region (101) comprises a plurality of active region columns (52) extending in a first direction and a plurality of active region row (53) extending in a second direction substantially orthogonal to the first direction and having concave portions (105). Floating gates (103) and control gates (104) are provided on the active region columns (52). The interlayer insulting film (109) formed as a layer below an upper wiring (110) is provided on the active region (101) and the control gates (104). Conductive sections (106) that electrically connect the upperwiring (110) and the active region (101) are respectively provided on the concave portions (105) on the active region rows (53).