The invention belongs to the technical field of power electronics. The invention relates to a low-parasitic-inductance high-reliability cascaded enhanced GaN HEMT device. The device comprises a packaging shell, insulating glue, conductive solder, a high-voltage depletion type transistor, a low-voltage enhancement type transistor, a voltage regulation circuit, a first conductive substrate, a secondconductive substrate, a third conductive substrate, a fourth conductive substrate, a first binding wire, a second binding wire and a third binding wire. According to the cascade enhanced GaN HEMT device provided by the invention, the optimization of the parasitic inductance is realized by minimizing the length of the binding wires; in addition, the voltage regulating circuit is added, so that thehigh-voltage depletion type GaN device is ensured to work in a safe region state.