An efficiency-optimized power supply control method based on a genetic algorithm. The method is based on a control system consisting of a front-stage buck-boost circuit, a rear-stage fixed-frequency LLC voltage regulating circuit, a sampling circuit, a sampling amplification isolation circuit, and a control circuit using a micro-controller as a control core. Sampling is performed to obtain efficiency-related evaluation factors during a system adjustment process, the factors comprising an output voltage Vo and an output current Io of the rear stage, and an input voltage Vin and an input current Iin of the front stage. A genetic algorithm module performs iterative computation according to an evaluation of the impact of control parameters, calculated by using different computation parameters k, on efficiency to obtain the computation parameter k best fitting the system, thereby optimizing operational efficiency of the system. When there is a change in a load of the system, the system utilizes a look-up table (LUT) to record a switch dead time of an upper and lower transistor of an LLC topology circuit corresponding to the load and an output voltage, such that a corresponding dead time can be directly looked up and read when the load is changed.