The invention relates to the field of analog integrated circuit design of microelectronics and provides an implementation way adopting two-step monoclinic ADC of H-CDS to meet the requirements of a CMOS image sensor for high speed and low noise of a reading circuit. The invention adopts a technical scheme that a column level ADC for the CMOS image sensor with hybrid CDS comprises a comparator, a latch, a counter, capacitors C1, C2 and C3 and switches SADC1, SADC2, S1, S2 and SF, wherein a pixel output is connected to upper electrode plates of the capacitor C1 and the capacitor C3 through the switch s1; a lower electrode plate of the capacitor C3 is connected to the ground; a lower electrode plate of the capacitor C1 is connected to an in-phase input end of the comparator; the in-phase input end of the comparator is connected to an output end of the comparator through the switch s2; and an inverted input end of the comparator is connected to a ramp signal through the switch SF. The column level ADC is mainly applied to analog integrated circuit design occasions of microelectronics.