The embodiment of invention discloses a fan-out type wafer level packaging structure and a manufacturing method thereof. The fan-out type wafer level packaging structure comprises a packaging body module. The packaging body module comprises at least two packaging units which are overlaid sequentially from the top to the bottom. Each packaging unit comprises at least one packaging chip and a first re-wiring layer electrically connected with the packaging chip. The re-wiring layers of two adjacent units are electrically connected through an in-module connector. The re-wiring layer of at least one packaging units extends to the edges of at least one side surfaces of the packaging body module. A signal interconnection module is arranged at at least one side surfaces of the packaging body module, and is electrically connected with the re-wiring layer extending to the edge. Power modules are arranged on at least one side surfaces of the packaging body module, and are electrically connected with the re-wiring layer extending to the edge. The fan-out type wafer level packaging structure can relieve the power supply pressure at the high stack system level packaging stack top layer of the fan-out type wafer level packaging structure, and reduce the interconnection space.