A different voltage standard label virtual circuit metal oxide semiconductor (LVCMOS) signal direct interconnection method comprises enabling output signals of a first chip with a first voltage standard to be sequentially input into a LVCMOS port of a second chip with a second voltage standard through a first buffer circuit, a first voltage dividing resistor, a transmission line and a second buffer circuit, and enabling the first voltage standard to be smaller than the second voltage standard; enabling the first end of a second voltage dividing resistor to be connected with a power supply with the output voltage value equal to the second voltage standard, and enabling the second end of the second voltage dividing resistor to be connected with the input end of the second buffer circuit; enabling output signals of a third chip with the second voltage standard to be sequentially input into a LVSMOS port of a fourth chip with the first voltage standard through a third buffer circuit, the second voltage dividing resistor, the transmission line, the first voltage dividing resistor and a fourth buffer circuit; and enabling the first end of the fourth voltage dividing resistor to be connected with the power supply with the output voltage values equal to the first voltage standard, and enabling the second end of the fourth voltage dividing resistor to be connected with the input end of the fourth buffer circuit.