The invention relates to a semiconductor device manufacturing method. In the semiconductor device manufacturing method including the process of aiming at that a substrate is carried out an ion implantation from a vergence direction, the downsizing of a gate electrode size and the improvement of a leakage current characteristic can be considered at the same time. A gate electrode is formed on a surface of a semiconductor substrate. A resist mask is formed that covers both end faces of the gate electrode in a gate width direction intersecting a gate length direction. Impurity ions are implanted into the semiconductor substrate in an implantation direction having a gate length direction component and a gate width direction component, to form a low-concentration impurity layer overlapping with the gate electrode at both sides of the gate electrode in the surface of the semiconductor substrate. A sidewall is formed that covers a side surface of the gate electrode. Impurity ions are implanted using the gate electrode and the sidewall as a mask, to form a high-concentration impurity layer apart from the gate electrode at both sides of the gate electrode on the surface of the semiconductor substrate.