A method of programming a non-volatile memory including N-bit multi-level cell (MLC) memory includes executing an incremental step pulse programming (ISPP) operation on the MLC memory cells, where the ISPP operation includes a programming sequence of first through Nth page programming operations, where N is an integer of 2 or more. The programming sequence further includes an erase programming that is executed after the (N-1)th page programming operation and before the Nth page programming operation, where the erase page programming increases a threshold voltage distribution of erase cells among the MLC memory cells.