The semiconductor structure formation method comprises the step of providing a substrate with an array region and a surrounding region; the array region comprises a plurality of first gate stacks; the surrounding region comprises a low-voltage component second gate stack and a high-voltage component third gate stack; a first dielectric layer is formed on the substrate; a second dielectric layer is deposited on the first dielectric layer; part of the second dielectric layer is removed, and only the second dielectric layer on the third gate stack is left; the second dielectric layer is deposited on the substrate once again; the second dielectric layer is etched to expose the first dielectric layer; the second dielectric layer in the array region is removed to expose the first dielectric layer; the first dielectric layer is etched to expose the upper surfaces of all the gate stacks; a first gap wall, a second gap wall and a third gap wall are respectively formed at the sidewall of each gate stack; and the third gap wall is the thickest, while the first gap wall is the thinnest. The method can be used for different component surrounding edges in the semiconductor structure to form thegap walls of different thickness.