An apparatus and method for interleaving systematic bits and parity bits to generate an output sequence that can be transmitted in multi-slot packets from a base station to a remote station in a wireless communication system. The apparatus comprises a memory element and a control element coupled to the memory element, wherein the control element is configured to demultiplex the systematic bits and parity bits into a plurality of sequences (400), wherein the systematic bits and parity bits are sequentially distributed among the sequences. The control element is further configured to reorder the sequences based on an index set (402), to group the sequences into a plurality of segments and to interleave each of the segments forming matrices having elements. The control element is also configured to modulate the elements (406) of the matrices, and to truncate the modulated elements (408) of each matrix, so as to produce the output sequence which comprises truncated modulating elements from each matrix of the matrices.