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发明授权
CN101226945B 薄膜晶体管阵列基板 有权

薄膜晶体管阵列基板
摘要：
本发明公开了一种薄膜晶体管阵列基板，包括：基板；多条扫描线，多条数据线；多个像素，各扫描线分别与其中一列像素电性连接，像素包括：多个第一像素列，各第一像素列包括多个第一像素，各第一像素包括第一薄膜晶体管以及第一像素电极，各第一像素电极与对应的扫描线以及数据线连接；多个第二像素列，各第二像素列包括多个第二像素，各第二像素包括第二薄膜晶体管以及第二像素电极，各第二像素电极与对应的扫描线以及数据线连接，而各第二薄膜晶体管具有一第二延伸源极，连接对应的数据线；以及，多个电容补偿导线，其包括第一电容补偿图案，第一薄膜晶体管与一侧的数据线电性连接，而第一电容补偿图案与另一侧的数据线连接。
摘要（英）：

The invention discloses a film transistor array base plate, which comprises a base plate, a plurality of scan lines, a plurality of data lines and a plurality of pixels, wherein the scan lines are arranged on the base plate, the data lines are arranged on the base plate, and the pixels are arrayed on the base plate, each scan line is respectively electrically connected with a list of pixels, further, film transistors are alternately electrically connected with two data lines which are arranged on the two sides in a same row of pixel and are aligned at the direction of the row, the partial pixels further comprise a capacitance compensation conductor, the film transistor is electrically connected with the data lines in the pixels which is equipped with the capacitance compensation conductor, and the capacitance compensation conductor is electrically connected with the data lines on the other side.

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