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发明公开
CN101226945A 薄膜晶体管阵列基板 有权

薄膜晶体管阵列基板
摘要：
本发明公开了一种薄膜晶体管阵列基板，其包括一基板、多条配置于基板上的扫描线、多条配置于基板上的数据线以及多个阵列排列于基板上的像素，各条扫描线分别与其中一列像素电性连接，而各个像素包括一薄膜晶体管以及一像素电极，像素电极通过薄膜晶体管与其中一条扫描线以及其中一条数据线电性连接，此外，在同一行像素中，薄膜晶体管是交替的与两侧的二数据线电性连接，且在行方向上对准，其中至少部分像素进一步包括一电容补偿导线，而在具有电容补偿导线的像素中，薄膜晶体管与一侧的数据线电性连接，而电容补偿导线与另一侧的数据线电性连接。
摘要（英）：

The invention discloses a film transistor array base plate, which comprises a base plate, a plurality of scan lines, a plurality of data lines and a plurality of pixels, wherein the scan lines are arranged on the base plate, the data lines are arranged on the base plate, and the pixels are arrayed on the base plate, each scan line is respectively electrically connected with a list of pixels, further, film transistors are alternately electrically connected with two data lines which are arranged on the two sides in a same row of pixel and are aligned at the direction of the row, the partial pixels further comprise a capacitance compensation conductor, the film transistor is electrically connected with the data lines in the pixels which is equipped with the capacitance compensation conductor, and the capacitance compensation conductor is electrically connected with the data lines on the other side.

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