The invention relates to a method for manufacturing a DRAM hollow column capacitor, in which, it provides a substrate with a polysilicon plug and then it provides a model dielectric layer with an open-end on the substrate which exposes the plug. And then, it forms an amorphous silicon gap wall on the side wall of the open-end and exposes partially the multicrystalline plug, removes part of the thickness of the exposed multicrystalline plug, and generates the hemispherical silicon particles layer on the surface of the amorphous silicon gap wall by using the crystal technology and then forms the capacitor dielectric layer on the surface of the hemispherical silicon particles layer, and then it forms the conducting layer on the capacitor dielectric layer. As the multicrystalline plug cannot form the hemispherical silicon particles, so the capacitor contact area will not be reduced. As a result, it can avoid the lower yield which may be caused by the capacitor dielectric layer.