US07961278B2
There is provided an optical sheet stack which includes a first optical sheet having a large number of irregularities consecutively arranged on one surface thereof, and a second optical sheet stacked thereon. In the optical sheet stack, the second optical sheet has, on a bonding surface thereof, an adhesive layer bonded with apexes of the irregularities, and while assuming pitch of arrangement of the irregularities as P, and width of bonding of each apex of the irregularities bonded to the adhesive layer as Pw, the relation of 0
US07961275B2
An in-plane switching liquid crystal display device includes a liquid crystal display panel having first and second substrates, a first polarizer disposed at a first surface of the liquid crystal display panel and having a first protective film, a first polarizing film, and a second protective film, a second polarizer disposed at a second surface of the liquid crystal display panel and having a third protective film, a second polarizing film, and a fourth protective film, and a first optical compensation film between the first polarizer and the liquid crystal display panel, the third protective film being adjacent to the liquid crystal display panel and having a substantially zero retardation value.
US07961271B2
To provide a flat lighting device used for a liquid crystal display device and the like that can be made thin and lightweight and produced at low cost, the lighting device of the present invention includes a plurality of surface light emitting plates which are two-dimensionally arranged. Each of the plurality of surface light emitting plates includes a light guide portion and a light source portion provided in an end portion of the light guide portion. The light guide portion and the light source portion are integrally provided. The light source portion of a surface light emitting plate two-dimensionally overlaps with the light guide portion of another surface light emitting plate adjacent thereto, so light having a uniform intensity can be emitted above the plurality of surface light emitting plates.
US07961263B2
A liquid crystal display can include a gate wire including a gate line, a gate pad and a gate line connector and a common signal wire formed on a substrate. A gate insulating layer may be formed over the gate wire and the common signal wire. A semiconductor layer and an ohmic contact layer may be sequentially formed on the gate insulating layer, a data wire including a source and a drain electrode, a data line, a data pad, a data line connector and a pixel electrode may be formed thereon. The thickness of the data wire and the pixel electrode may be equal to or less than 500 Å.
US07961260B2
The present invention discloses a stereoscopic display device with a parallax barrier. The parallax barrier includes: a first substrate; a plurality of first electrodes parallel to each other and stretching in one direction on the first substrate; a transparent insulation layer between the first substrate and the first electrodes; a plurality of second electrodes parallel to each other and stretching in one direction on the opposite side against the first electrodes; a common electrode between the second substrate and the transparent insulation layer; and a liquid crystal layer between the common electrode and the second electrodes. In particular, the plurality of first electrodes and second electrodes interlace with each other and each contains partial overlapping in the vertical direction.
US07961257B2
A color adjusting apparatus includes a first storage unit for storing information indicating a hue (color phase) range arbitrarily designated in a hue space, a second storage unit for storing an adjustment value for adjusting a degree of color shift in the hue range, and a color conversion unit for performing expansion processing or compression processing on a color component of input image data, the color component being associated with the hue range, in accordance with the degree of color shift determined by the adjustment value.
US07961256B2
A system and method for bad weave detection for inverse telecine. To detect a bad weave artifact, the number of reversals of the difference polarity between successive lines within a column of samples is counted. The count of the number of reversals of the difference polarity is referred to as the polarity change count. In the execution phase, the polarity change count can be used by a bad weave detector to take a system out of lock. The polarity change count can also be used during the detection phase to detect a particular cadence.
US07961255B2
A television on a chip (TVOC) system that provides a cost effective approach for providing television functionality on a single integrated circuit chip is disclosed. A TVOC includes the functionality necessary to receive and display television signals in a variety of input and output formats. A TVOC can be used in set-top boxes for cable and satellite television, or directly within a television. All functionality provided can be provided on a single integrated circuit. TVOC includes a data transport module, an IF demodulator, a digital audio engine, an analog audio engine, a digital video engine, and an analog video engine. The TVOC also includes three sets of interfaces including output interfaces, control interfaces and ancillary interfaces. Further features and embodiments provide enhanced functionality and increased efficiencies.
US07961246B2
A blade driving device for use in cameras that includes a mechanical shutter blade that openably and closably disposed in front of a CCD, and is capable of blocking light passing through an exposure aperture. The blade driving device also includes a motor that drives the shutter blade, and a control means that drive-controls the motor. In this blade driving device, photography is performed such that the storage of an electric charge starts in the CCD and the closing motion of the shutter blade is completed. Opening energization is applied to the motor in order to allow the shutter blade to pre-perform an opening motion before performing a closing motion whenever a still image is photographed. Thus, the shutter blade always reaches an opened state prior to photography even if the shutter blade is closed without permission by receiving an impulsive force from the outside because of, for example, being dropped. Therefore, photography can be reliably performed.
US07961243B2
A camera unit 100 is provided and includes an imaging device for receiving light of an optical image incident from a lens unit; a support board for supporting the imaging device; and a holder having an attachment part to which the support board is attached. The attachment position of the support board in the optical axis direction to the holder is determined by means of an irregularity part formed on the attachment part of the holder or the support board so that the light reception surface of the imaging device matches the image formation position of the optical image.
US07961240B2
A method for driving an image pickup device in which a predetermined voltage which is between a power source voltage and a reference voltage is generated, a voltage of an output signal line to the predetermined voltage is set, and a reset voltage from a pixel circuit is output to the output signal line.
US07961239B2
The present invention relates to a CMOS image sensor. According to the present invention, the CMOS image sensor includes a two-dimensional pixel array (110), a row decoder (130), and a column decoder (150). The two-dimensional pixel array (110) includes rectangular unit pixels each having a width to length ratio of 1:2. The row decoder (130) is placed on one side of the pixel array to designate a row address. The column decoder (150) is placed on another side of the pixel array to be perpendicular to the row decoder and is adapted to extract data of respective pixels from a row selected by the row decoder, amplify the extracted data and generate image data including pixel values. As a result, the present invention is advantageous in that it can easily perform interpolation compared to an image sensor having regular quadrilateral unit pixels.
US07961234B2
The invention relates to electronic equipment. The equipment includes camera means for forming data from an object located in the imaging direction, in which case the said camera means include at least two camera units (CAM1, CAM2) and data-processing means, which are arranged to process the data formed using the camera means, in a manner corresponding to the currently selected imaging mode, to form image information. In the equipment, the mutual position of the camera units (CAM1, CAM2) relative to each other is arranged to be altered to correspond to the current imaging mode.
US07961227B2
The digital camera comprises: an image-taking device for converting light from a subject to a video signal and outputting the video signal; an image processor which has a gain adjuster for performing gain adjustment individually for respective color information of R, G, B of the video signal outputted from the image-taking device, and an image data converter for converting the adjusted video signal outputted from the gain adjuster into image data; a displaying device for displaying the image data; a setting device; and a controller for controlling the gain adjuster to perform RGB color discrimination of the video signal and gain adjustment individually on the respective color information by a command from the setting device.
US07961210B2
An optical scanner used for an image-forming device to form a color image includes a plurality of photosensitive drums for superimposing a developer image formed on each of the plurality of photosensitive drums. The optical scanner includes a casing, a plurality of light sources, a deflector, an optical system, and a storage device. The plurality of light sources is provided in a one-to-one correspondence with the plurality of photosensitive drums. Each of the plurality of light source emits a laser beam. The deflector is provided in the casing for deflecting the laser beam. The optical system is provided in the casing for guiding the deflected laser beam to a corresponding one of the plurality of photosensitive drums to make the laser beam scan the corresponding one of the plurality of photosensitive drums. The storage device stores a characteristic related to the laser beam scanning the corresponding one of the photosensitive drums.
US07961208B2
An image is formed by dividing rasterized original image data into regions in accordance with N recording heads, and scanning a recording body by simultaneously irradiating recording beams from the N recording heads. Corrected image data divided into regions in accordance with the recording heads are generated by changing the rasterized original image data based on information including positional displacements of the recording beams, so that the positional displacements are corrected. Scanning information is generated based on the positional displacement information. The scanning information includes positions and orders for the recording beams to scan the recording body to record the corrected image data.
US07961206B2
An apparatus for image formation is disclosed which includes an imaging device forming images on record media; a housing defining a front face, a rear face, both side faces, a top face and a bottom face, to thereby house the imaging device; a recessed portion configured so as to be openable at selected at least one of the front face, the both side faces and the top face of the housing; and an attachment mechanism allowing a data-storable external storage device to be attached to the apparatus for electrical connection thereto, the attachment mechanism being in a position allowing the external storage device, when attached to the attachment mechanism, to be accommodated within the recessed portion.
US07961204B2
A gray-scale representation method for a plasma display panel, which method includes arranging, in time sequence, a plurality of subfields each having a brightness weight and achieving gray-scale representation by a combination of the subfields, each subfield including an address period and a sustain period. In the gray-scale representation method, the number of sustain pulses for each subfield is determined so that a light generated from the difference of the number of sustain pulses between two adjacent gray scales can be greater than a light discharged in the address period, when the number of subfields for the higher one of the two adjacent gray scales is less than that for the lower one. The reversion of gray scales that occurs when the address light is increased as high as the sustain light can be eliminated to achieve correct gray-scale representation. A smoother gray-scale representation can be achieved with reduced power consumption by adjusting the difference of the number of sustain pulses between the two adjacent gray scales in consideration of the address light.
US07961203B2
A display screen is controlled through successive scans of the display screen. Each scan of the display screen includes a successive selection of rows of the display screen. For each row selected, and in accordance with a normal selection, a first column selection mode is implemented wherein a first selection signal is generated for the column, that first selection signal going from a first state towards a second state with an intermediate plateau level therebetween. In an alternative operation, a second column selection mode is provided which replaces the first column selection mode, the second column selection mode including the generation of a second selection signal going from the first state to the second state without any intermediate plateau level. At least at the start of each scan, the first selection mode is replaced by the second selection mode and this second selection mode is maintained for a given column, at the latest, for as long as no deselection of the column has been effected.
US07961199B2
Embodiments of the present invention comprise systems, methods and devices for adjusting image code values in conjunction with display light source illumination levels for enhanced image display.
US07961197B1
Method and apparatus for display image adjustment is described. More particularly, handles associated with polygon vertices of a polygon rendered image are provided as a graphical user interface (GUI). These handles may be selected and moved by a user with a cursor pointing device to adjust a displayed image for keystoning, among other types of distortion. This GUI allows a user to adjust a projected image for position of a projector with respect to imaging surface, as well as for imaging surface contour, where such contour may be at least substantially planar, cylindrical, or spherical and where such contour may comprise multiple imaging surfaces. This advantageously may be done without special optics or special equipment. An original image is used as texture for rendering polygons, where the image is applied to the rendered polygons.
US07961186B2
A method for combining at image data sets to generate a composite image. The method divides each of the data sets into a plurality of bricks along three mutually orthogonal axes. The method includes (a) building a hierarchical structure for each one of the at least two data sets, each structure comprising higher level blocks of voxels and lower level blocks of voxels, the higher level blocks having a larger number of voxels than the lower level blocks; (b) expanding boundaries of each one of the structures into corresponding expanded hierarchical structures, such boundary expanding comprising adding additional virtual processing bricks to the initial processing bricks, such virtual processing bricks comprising semi-unbounded blocks to provide the expanded boundaries of the expanded hierarchical structures; and (c) rendering each one of the bricks in each one of the expanded hierarchical structures into a two dimension image.
US07961169B2
A timing controller includes an interface controller that reads out a current identification code and current address information of the current identification code. A data comparator compares a previous identification code stored in a memory provided in the timing controller with the current identification code. If the current identification code is different from the previous identification code, the interface controller reads out current parameter data corresponding to the current identification code from the memory and a data processor processes image data by using the current parameter data. The timing controller recognizes the update state of the parameter data stored in the memory and processes the image data by using the updated parameter data.
US07961166B2
A liquid crystal display device including a liquid crystal display panel in which data lines and gate lines cross and a plurality of liquid crystal cells are arranged; a data discrimination part to detect data in which a dominant polarity is generated; a data driver to shift a polarity of the data in which the dominant polarity is generated in a horizontal direction and to supply the data to the data lines; and a gate driver to sequentially supply a scanning signal to the gate lines.
US07961165B2
A liquid crystal display device includes a plurality of pixels, each of which includes a liquid crystal capacitor made up of a liquid crystal layer and two electrodes to apply a voltage to the liquid crystal layer. While the device is conducting a display operation, an oscillation voltage, which oscillates a number of times within a single vertical scanning period, and a predetermined gray-scale voltage are applied to the liquid crystal capacitor of an arbitrary one of the pixels.
US07961164B2
A signal processing device and method of manufacturing the same include a converting unit converting first, second, and third image data into first sub first image data, first sub second image data, and first sub third image data having gray levels higher than the gray levels of first, second, and third image data, respectively, and second sub first image data, second sub second image data, and second sub third image data having gray levels lower than the gray levels of the first, second, and third image data, respectively, a first correcting unit which compares the first sub image data, corrects the first sub second image data according to the comparison result, and outputs corrected first sub second image data, and a second correcting unit which compares the second sub image data, corrects the second sub second image data according to the comparison result, and outputs corrected second sub second image data.
US07961163B2
A liquid crystal display device includes a data transition part to compare a number of transitions between a previous data and a current data to selectively invert the current data and to generate a reverse signal, a memory to store the data from the data transition part and to output the stored data as the previous frame data, a data reverse transition part to reversely convert the data from the memory using the reverse signal, a lookup table to compare the current data and the previous frame data reversely converted by the data reverse transition part to select a modulated data, and a display drive circuit to display the data from the lookup table on a liquid crystal display panel.
US07961162B2
In a liquid crystal display device, both of the brightness characteristic and the chromaticity characteristic are set to optimum values. In the liquid crystal display device which includes a liquid crystal display panel, a data driver, a scanning driver and a display control circuit, the display control circuit includes a first circuit which generates insertion display data which differs from the image display data and inserts the display data into the data driver, and a second circuit which sets a first time at which the scanning signal for displaying the display data and a second time at which the scanning signal for displaying the insertion display data are outputted. The first circuit generates display data of one chromatic color and, at the same time, sets gradations of chromatic color for every frame period.
US07961160B2
A display device in which a current supplied to a light emitting element is corrected depending on a degradation level of the light emitting element and display variations due to the degradation of each light emitting element are suppressed. Further, according to the display device of the invention, the effect of variations in TFTs is reduced and writing time of a signal is shortened. To achieve the aforementioned display device, according to the invention, a current value supplied to a light emitting element is corrected in accordance with the degradation thereof instead of correcting a video signal. Further, the display device comprises at least a supply source for supplying a corrected current depending on the degradation of a light emitting element and a current source for supplying the corrected current from the supply source to the light emitting element. Moreover, according to such a display device, a first current source of the supply source supplies a corrected current corresponding to the degradation of the least degraded light emitting element of the light emitting elements connected to the same signal line, meanwhile a second current source supplies a corrected current corresponding to the degradation of the most degraded light emitting element of the light emitting elements connected to the same signal line.
US07961158B2
A constant-current driving circuit includes a first current source, a reference voltage generating circuit and an output signal generating circuit. A terminal of the first current source is coupled to a terminal of a first LED string, wherein the terminal of the first current source has a first voltage. The reference voltage generating circuit is used for generating a reference voltage and comparing the first voltage with a first predetermined voltage to generate a first comparing signal to thereby adjust the reference voltage. The output signal generating circuit is used for outputting an output signal to another terminal of the first LED string and receiving the input signal, wherein the output signal generating circuit decides whether or not to output the input signal serving as the output signal according to the comparison result of the reference voltage with the second voltage.
US07961157B2
An imaging system, comprising an image source and a plurality of microtile units for generating respective portions of an image, each microtile unit including a plurality of coupling mechanisms for connection to a plurality of other microtile units such that the microtile units may be arranged in multiple geometrical configurations, and each microtile unit including circuitry for communication with the other microtile units to control generation of each respective portion of the image.
US07961152B2
An electronic device includes a helical resilient member serving as an electrical inductance element. The electronic device also includes an antenna, a signal feeding line, and a transmitting/receiving module. The helical resilient member has first and second ends with a predetermined number of turns of coil arranged therebetween the first and second ends, and is made of electrically conductive materials so that the turns of coil defines an electrical inductance. The signal feeding line is connected between the helical resilient member and a signal feed point of the antenna. The transmitting/receiving module is connected to the helical resilient member so as to couple the inductance of the helical resilient member to the transmitting/receiving module.
US07961147B1
A method for determining an angle-of-arrival for a detected signal. The method includes the steps of receiving the signal at a first antenna, receiving the signal at a second antenna, generating a plurality of spectral lines based on a complex multiplication of a complex conjugation of the signal received at the first antenna and the signal received at the second antenna, generating a delta phase difference for pairs of the spectral lines using frequency differences, and generating an angle-of-arrival for the detected signal based on an average of the delta phase difference.
US07961143B2
A method for performing integer ambiguity resolution in a global navigation satellite system is disclosed. A set of ambiguities, which are associated with carrier phase measurements of at least some of the signals received from the satellites in an identified set of satellites, are identified. Integer ambiguities are estimated and a best candidate set and a second best candidate set of integer ambiguity values are determined. Upon determining that the best set of integer ambiguity values fail to meet a discrimination test, each ambiguity for which integer ambiguity values in the best candidate set and second best candidate set fail to meet predefined criteria are removed from the set of ambiguities to produce a reduced set of ambiguities. The integer ambiguities in the reduced set of ambiguities are then resolved and an output is generated in accordance with the resolved integer ambiguities.
US07961142B2
Estimation calculations for calculating an estimated present position are performed twice corresponding to each satellite set. The estimated present position calculated by the second estimation calculations is determined to be a present position candidate corresponding to the target satellite set. In the first estimation calculations corresponding to the first satellite set, the calculated satellite position and estimated pseudo-range of each GPS satellite are stored in caches. In the second estimation calculations, the satellite position of each GPS satellite is read from the cache. In the first estimation calculations corresponding to the second or subsequent satellite set, the satellite position and the estimated pseudo-range of each GPS satellite are read from the caches, and the satellite position and the estimated pseudo-range of the GPS satellite of which the satellite position and the estimated pseudo-range have not been stored in the caches are calculated and stored in the caches. In the second estimation calculations, the satellite position of each GPS satellite is read from the cache.
US07961138B1
A detector apparatus, detection system, and method are provided for determining optimum operational angles based on the statistical correlation of wavelength-specific electromagnetic propagation and surface interaction. These techniques can be used within the radar community in both military and commercial radar applications for airborne radar system users to determine optimum operational depression angles based on the purpose of the effort, the operational frequency, and the terrain-type to be encountered. The method requires the user to interface with a standard computer equipped with the commercially available MATLAB® software package where the operation is presented as a graphic user interface (GUI) that once invoked allows the user to set specific parameters corresponding to the desired terrain type. Upon doing so, the algorithms are exercised and the results are displayed in a series of figures identifying the optimum operational angles.
US07961136B2
A method and system that receives and processes ADS-B data from one or more aircraft is disclosed. The system may include one or more ground stations that receives data from one or more aircraft and converts the received aircraft ADS-B data to XML format, determines the lowest cost communication mode available, and transmits the XML data over TCP/IP to an aircraft data server. The aircraft data server receives the aircraft ADS-B data in XML format from the one or more ground stations, processes the received ADS-B data to extract aircraft data and eliminate duplicate aircraft data; determines aircraft data missing from the processed aircraft data, receives supplemental aircraft data from other sources to provide aircraft data missing from the processed aircraft data, and outputs the processed aircraft data and the received supplemental aircraft data to one or more processing devices for processing and display.
US07961123B2
A time-interleaved (TI) analog-to-digital converter (ADC) is provided. The TI ADC generally comprises a clock generator, two or more ADCs, adjustable delay elements, and an estimator. The clock generator generates clock signals. Each ADC is associated with at least one of the clock signals so as to sample an input signal that is generally wide-sense stationary at sampling instants, where correlation function exist between samples from a two or more of the ADCs that is a function of the time differences between associated sampling instants. The estimator is coupled to each of the adjustable delay elements and each of the ADCs so as to calculate the correlation function and adjust the adjustable delay elements to account for sampling mismatch between the ADCs based at least in part on the correlation function.
US07961122B1
A parallel based 5 bypass bin CABAC decoder may include a 3 bypass bins decoder appropriately coupled to a 2 bypass bins decoder. The 3 bypass bins decoder may have a first input receiving a bitstream, a second input receiving range values, a first output outputting a first bypass bin, a second output outputting a second bypass bin, a third output outputting a third bypass bin, and a fourth output outputting a shifted bitstream to the 2 bypass bins decoder. The 2 bypass bins decoder may have a first input to receive the shifted bitstream, a second input to receive the range values, a first output outputting a fourth bypass bin, and a second output outputting a fifth bypass bin.
US07961117B1
The embodiments disclosed herein present novel and non-trivial system, module, and method for creating a variable FOV image presented on a HUD combiner unit. A processor receives navigation system data and data associated with eye position. A variable FOV image data set representative of navigation symbology is generated, where the image data set is determined by applying the navigation system and eye position data to an adaptive FOV function, where the function correlates eye position to an FOV image. The image data set is presented to a HUD system where an image represented in the image data set is displayed on a combiner unit, whereby the image FOV correlates to eye position. Furthermore, the processor may receive terrain data and generate a variable FOV image data set inclusive of data representative of a three-dimensional perspective scene outside an aircraft.
US07961116B2
An aircraft display system (100) includes a first device (102) providing (402) flight data of a selected flight path of an aircraft (214), a device (106, 114) providing (404) a plurality of data points representative of the terrain (302) below the selected flight path, a processor (104) generating (406) display commands from the flight data and the plurality of data points, and a display (116) coupled to receive the display commands and operable to render (408) in a perspective view an icon representative of the aircraft (214) and the terrain (302) near the aircraft (214).
US07961107B2
This disclosure discloses an apparatus for producing RFID label includes: a cartridge holder detachable with respect to a cartridge having a base tape provided with a RFID circuit element provided with an IC circuit part and a tag antenna, a loop antenna configured to transmit/receive information with the RFID circuit element via radio communication, and a cartridge connector configured to supply power to the loop antenna; a tape feeding roller configured to feed the base tape; and an apparatus connector configured to supply power to the cartridge connector.
US07961104B2
A computer implemented method, apparatus, and computer program product for communicating the shelf position of an item within a storage unit. An item to be located in the storage unit is identified. The storage unit system determines the shelf position of the identified item. The system then communicates the shelf position of the identified item to the user. If the user requests multiple items, the optimal sequence of retrieval for the items is determined based on a user configurable algorithm.
US07961102B2
A method for installing an RFID tag on shipping articles includes applying a strip of conductive material to the surface of the article and providing an RFID chip having a body, a first bottom conductive point, a second bottom conductive point and a nonconductive fin between the first bottom conductive point and the second bottom conductive point. The fin is received in the shipping article. The RFID chip is attached to the shipping article by inserting the chip onto the strip of conductive material on the shipping article such that the fin severs the strip into a first strip and a second strip. The first bottom conductive point is electrically attached to the first strip and the second bottom conductive point is electrically attached to the second strip.
US07961099B2
A method and device for protecting an article, wherein the security device has belt having a latch mating element. A magnetically actuable locking mechanism has a magnetically actuable latch and a flexible element. The magnetically actuable latch includes a lower surface having at least one protrusion extending there from and adapted to engage with the latch mating element of the belt, and a front surface adjacent the lower surface. The front surface has a lateral notch formed therein. The flexible element biases the magnetically actuable latch and the belt into a locked position. A housing has the magnetically actuable latch disposed therein and housing includes a passageway therein defining a belt pathway configured to slidingly receive the belt therein.
US07961092B2
The invention is directed to a location tracking device and auxiliary device for use with a monitoring center for tracking individuals or objects. The location tracking device has position determining circuitry and first wireless circuitry that communicates position data representative of the location of the tracking device to a remote location (e.g., a monitoring station). The tracking device also has second wireless circuitry that communicates with the auxiliary device. The tracking device has at least two operational modes and switches between these modes when communication is established between the tracking device and the auxiliary device so long as one or more predetermined conditions are satisfied. In one operational mode the position determining circuitry of the location tracking device is in a normal power state and in another operational mode such circuitry is in a reduced power state.
US07961088B2
A portable security system for monitoring an asset has one or more alarm sensors and a wireless transmitter/receiver that communicates via wireless communication with a host system. The portable security system is switchable between a disabled (partially powered) state and an enabled (fully powered state) in response to commands received from the host system. In an aspect, the portable security system has a plurality of alarm sensors which a user can separately activate and deactivate via the host system. In an aspect, the portable security system includes a base unit and an auxiliary unit. The base unit includes one or more of the alarm sensors that serves a dual purpose depending on whether the base unit is mated with the auxiliary unit. In an aspect, the host system can be utilized by multiple users to manage portable security systems associated with the respective users, including management by group. In an aspect, the host system notifies a user(s) of an alarm condition(s).
US07961086B2
A method for communicating with a vehicle has a generator for producing a data stream that can indicate, street sign information, house number, lead vehicle information, traffic information, oncoming vehicle information, juxtaposed vehicle information, a voice channel, etc. vehicle information can indicate braking, low beam requests, direct or indirect traffic flow information, adjacency, partial adjacency, or presence of nearby vehicles, etc. This signal is generated by at least one of: the sign, house number, oncoming vehicle, lead vehicle, operator of the lead vehicle, operator of the oncoming vehicle, operator of the juxtaposed vehicle, a traffic control system. A device for generating such data streams is discussed, as well as, a device for receiving such data streams. Information pertinent to the people in the vehicles or operation of the vehicle can be modulated on the link.
US07961078B1
A radio device such as a wireless tag reader communicates with multiple types of wireless identification tags in a monitored region. The radio device includes a network interface to receive messages transmitted over a network. In response to receiving a message indicating to reconfigure the radio device to support an additional wireless tag protocol, the radio is reconfigured to support communications with a corresponding new type of wireless identification tag in a monitored region. Based on this technique of reconfiguring the radio device via network messages, the radio device optionally supports additional, new or latest versions of wireless tag protocols without having to physically reprogram or replace the radio device.
US07961054B2
An embodiment of the present invention is a technique for timing recovery. A frequency acquisition loop locks a voltage controlled oscillator (VCO) clock of a multi-band VCO to a reference clock. The frequency acquisition loop generates first and second feedback clocks from the VCO clock. A data lock phase loop generates a driving signal corresponding to a phase error signal from interleaved partial response signal (PRS) samples based on the second feedback clock. The driving signal controls the multi-band VCO in a data phase lock mode. A lock detect controller detects a frequency lock condition in a frequency lock mode and a data lock condition in the data phase lock mode based on the first feedback clock and the reference clock.
US07961053B1
Consistent with the present disclosure, a “dummy” transimpedance amplifier (dummy TIA) is provided on a substrate along with one or more other transimpedance amplifiers (TIAs) that are connected to photodiodes and output voltage signals for further processing. Typically, the dummy TIA is not connected to a photodiode and does not supply a useful output. The dummy TIA, however, is subject to the same processing and temperature variations as the other TIAs, and, as a result, the voltage on the dummy TIA inverting input will be the same or substantially the same as that of the other TIAs. Thus, by sensing the dummy TIA inverting input voltage, an appropriate photodiode bias can be obtained without direct measurement of the voltage on the inverting inputs of the other TIAs.
US07961050B1
An integrated circuit includes a differential amplifier. The differential amplifier includes at least one output end. A circuit is coupled with the at least one output end of the differential amplifier. The circuit does not include a resistor-capacitor (RC) network and is configured for providing a negative impedance to the differential amplifier for adjusting a direct current (DC) gain of the integrated circuit.
US07961038B2
A digital proportional integral loop filter is provided. A first proportional amplification unit multiplies a phase error value by a first proportional loop gain, and a first integral amplification unit multiplies a phase error accumulation value by a first integral loop gain. A second proportional amplification unit multiplies the phase error value by a second proportional loop gain, and a second integral amplification unit multiplies the phase error accumulation value by a second integral loop gain. A first offset value generation unit generates a first offset value by subtracting the second proportional loop gain from the first proportional loop gain and multiplying a resulting value by a phase error average value, and a second offset value generation unit generates a second offset value by subtracting the second integral loop gain from the first integral loop gain and multiplying a resulting value by a phase error accumulation average value.
US07961037B2
Provided is an intermediate potential generation circuit with a lower power supply potential. The intermediate potential generation circuit includes: a current mirror circuit including a first transistor and a second transistor each having a source input with a power supply potential; a current source circuit including a third transistor having a drain connected to a drain of the first transistor; a grounded source amplifier circuit including a fourth transistor having a gate input with the intermediate potential, and a drain connected to a drain of the second transistor; a parallel connection circuit including a fifth transistor connected in parallel with the first transistor, and a sixth transistor connected in parallel with the second transistor; and a source follower circuit including a seventh transistor and an eighth transistor having gates that are connected in common to each other, and connected with the drains of the second transistor and the sixth transistor.
US07961036B2
Internal voltage generation circuit including a reference oscillation signal generator for generating a reference oscillation signal according to a comparison result of a pumping voltage with a reference voltage, an oscillation signal generator for generating a plurality of oscillation signals with a predetermined phase difference and a pumping voltage generator for generating a pumping voltage through sequential charge pumping operations performed in response to the plurality of oscillation signals, respectively.
US07961024B1
A low power pulse-triggered flip-flop comprises a latch containing a first conductive line and a first connection point and a pulse generator linking to the latch. The pulse generator includes a first N-transistor, a second N-transistor, a third N-transistor, a first inverter and a first P-transistor located on the first conductive line. The first N-transistor is connected to the first connection point and first conductive line. The second N-transistor and the third N-transistor are connected to the first conductive line, a second conductive line and a third conductive line. The first inverter is connected to the second conductive line. The present invention aims to reduce leakage power in a high level fabrication process, and can save power consumption and power-delay-product more than 17% over the conventional pulse triggered flip-flop, and also provides a smaller size of total transistors to lower average leakage current power consumption by 2.4 times.
US07961023B2
A digital circuit implementing pulse width modulation controls power delivered in what one can model as a second order or higher order system. An exemplary control plant could embody a step-down switch mode power supply providing a precise sequence of voltages or currents to any of a variety of loads such as the core voltage of a semiconductor unique compared to its input/output ring voltage. One of several algorithms produce a specific predetermined sequence of pulses of varying width such that the voltage maintains maximally flat characteristics while the current delivered to the load from the system plant varies within a range bounded only by inductive element continuous conduction at the low power extreme and non-saturation of the inductor core at the high power extreme. The specific pulse width modulation sequence controls a plant such that the voltage maintains maximally flat characteristics in one embodiment without a feed-forward or feedback loop physically embodied in the control system thereby reducing the parts cost or control semiconductor production yield cost while enhancing noise immunity and long term reliability of the control system. Several specific algorithms maintain maximally flat voltage despite extreme load variations therewith control plant element parameters otherwise exacerbating excessive voltage fluctuation during the given current transients.
US07961016B2
A charge pump includes a first transistor, a second transistor, a first, a second and a third selectors. The first transistor includes a gate electrode, a first electrode, and a second electrode which serves as an output port of the charge pump. The second transistor includes a gate electrode, a first electrode and a second electrode, where the gate electrode of the first transistor is coupled to the gate electrode of the second transistor, and the gate electrode of the second transistor is coupled to the second electrode of the second transistor. The first selector is utilized for selectively connecting the first transistor to a first supply voltage. The second selector is utilized for selectively connecting the first transistor to a second supply voltage. The third selector is utilized for selectively connecting the second transistor to the second supply voltage.
US07961014B2
Apparatus and methods for providing multi-mode clock signals are disclosed. In some embodiments, a multi-mode driver configured to receive a first clock signal, and to selectively output a different clock signal in response to one or more signals from a controller is provided. The driver can include an H-bridge circuit without substantial increases in the size of the design area. Advantageously, lower jitter and improved impedance matching can be accomplished.
US07961008B2
A data output driving circuit includes a plurality of driving units that are set to have different impedance values from one another, and the number of driving units is less than the number of a plurality of required driving impedance values such that the driving units can obtain the plurality of required driving impedance values by a combination thereof, and a driving control unit that independently controls the operation of the plurality of driving units so as to obtain the plurality of driving impedance values required.
US07961007B2
In one embodiment, a receiver circuit is provide that may receive either a differential input or a single-ended input corresponding to an interface. The receiver circuit may include at least two current sources to control a gain of an amplification stage in the receiver. If the receiver circuit is receiving a differential input, one of the current sources may be used. If the receiver circuit is receiving a single-ended input, both of the current sources may be used. A larger gain may thus be provided for the single-ended input as compared to the differential input.
US07961004B2
A FPGA comprising, a direct interconnect structure for providing selective data routing without stressing the general-purpose routing resources and enabling high rate of data exchange within the FPGA. At least two IP cores are connected to each other through said direct interconnect structure for enabling simultaneous data interaction among the ports of said IP cores and for providing configurable bus width routing between said IP cores, and a plurality of logic blocks connected to said IP cores through said direct interconnect structure for enabling simultaneous data routing among said IP cores and said plurality of logic blocks.
US07960980B2
A testing device to test a plate for electronic circuits, comprising transport members able to transport the plate along an axis of feed (Y), at least from an entrance station to a testing station defining a testing plane (P′), and testing members, disposed in correspondence with the testing station. The testing device also comprises an alignment station defining an alignment plane (P), disposed upstream of the testing station, and alignment members, disposed in correspondence with the alignment station, able to dispose the plate in an aligned position, in which the plate is disposed symmetrical both with respect to the axis of feed (Y) and also with respect to a first axis (X) substantially transverse and co-planar to the axis of feed (Y).
US07960976B1
A cable testing system that tests cable includes a pulse generation module that transmits a first pulse on a first communications channel of the cable. A sampling module waits a predetermined time period after the pulse generation module transmits the first pulse and then detects a first amplitude of a reflected signal on a second communications channel of the cable. A time domain reflection (TDR) module receives the first amplitude and verifies proper operation of the cable based on the first amplitude. The predetermined time period corresponds with an estimated roundtrip propagation delay of the first pulse when the first pulse is reflected back to the cable testing system after traveling a first predetermined distance along the cable. The sampling module incrementally increases the predetermined time period during subsequent iterations of a cable test in order to verify proper operation of a predetermined segment of the cable.
US07960973B2
A device rotates at least one static magnetic field about an axis, producing a rotating magnetic dipole field, and is movable in relation to the surface of the ground. The field is periodically sensed using a receiver to produce a receiver output responsive to the field. A positional relationship between the receiver and the device is monitored using the output. In one aspect, changing the positional relationship, by moving the device nearer to a boring tool which supports the receiver, causes an increase in accuracy of depth determination. In another aspect, determination of an actual overhead position of the boring tool, and its application, are described. Use of a plurality of measurements over at least one-half revolution of each magnet is disclosed. Establishing a surface radial direction toward a boring tool and resolution of multi-valued parameters is described. Calibration techniques, as well as a three transmitter configuration are also described.
US07960972B2
The present invention provides a sensor selection device for selecting sensor elements of a magnetic resonance imaging device, the sensor selection device comprising a provider for providing a first characteristic property (601) of a first sensor element (603) within a predetermined scan volume and for providing a second characteristic property (605) of a second sensor element (607) within the predetermined scan volume (215), a means for determining a mutual quantity from the first characteristic property (601) and from the second characteristic property (605), and a selector for selecting or for excluding the first sensor element (601) or the second sensor element (601) based on the mutual quantity.
US07960964B2
A method for determining a network structure or layout of at least a part of an electricity transport network, for instance a low voltage part of this network extending in a city, includes providing a test signal to the network at at least first network location; and verifying whether the test signal, which has been provided to the first network location, reaches at least a second network location, in particular utilizing at least one detector. An embodiment of the invention relates to a system for determining a network structure or layout of at least a part of an electricity transport network.
US07960958B2
An integrated circuit includes an output terminal. A plurality of feedback terminals receives a feedback signal. A voltage regulator has a feedback input in communication with the plurality of feedback terminals to receive the feedback signal. The voltage regulator has a power output in communication with the output terminal. The voltage regulator is responsive to the feedback signal to generate the power output.
US07960957B2
A headroom compensation circuit for a voltage converter for ensuring that there is adequate headroom voltage to enable accurate operation of the current sense amplifier sensing the output current of the converter, the headroom compensation circuit comprising an error amplifier for comparing an output voltage of the converter to a reference voltage to set the converter output voltage; and a circuit for providing a bias current to an input of the error amplifier when a supply voltage to the current sense amplifier within a predefined threshold of the converter output voltage to cause the error amplifier to reduce the converter output voltage thereby to increase the headroom voltage for the current sense amplifier, said headroom voltage being defined as a voltage between the supply voltage to the current sense amplifier and said converter output voltage.
US07960956B2
A controller is provided for DC-DC converters of the type associated with a half-bridge driving stage of at least one inductive load, with a pair of power MOS transistors in Highside and Lowside configuration being driven by a corresponding converter. The controller includes an input for connection to a terminal of the inductive load. The controller also includes a read block for reading an inductive load phase current at the terminal, an over current comparator having a first input coupled to an output of the read block, and a bypass compensation network including an error amplifier block having a first input coupled to the terminal through a voltage divider, and a second input coupled to a reference potential. The compensation network has an output that is coupled to a second input of the over current comparator, and an output of the over current comparator is supplied to the DC-DC converter.
US07960946B2
A power supply circuit charging a secondary battery by a DC-DC converter using a switching element and an inductance element includes a current adjustment circuit. The current adjustment circuit adjusts a charging current of the secondary battery by turning on/off the switching element according to a voltage difference of a lower one of a reference voltage and a first control voltage corresponding to a temperature of the secondary battery from a current detection voltage corresponding to the charging current of the secondary battery.
US07960945B1
The present disclosure provides methods and systems for estimating the remaining use time of a battery of a mobile device. In some implementations, the method includes providing a use profile programmed in a memory of the mobile device, and monitoring a rate of change of a state of charge (SOC) of the battery. The rate of change of the SOC and the use profile are processed to affect a comparison therebetween, and the remaining use time is estimated based on the comparison.
US07960936B2
Methods and apparatus to lock a phase lock loop to a spindle motor are disclosed. An example controller comprises a counter to determine a period of an operating signal received from a motor, an oscillator to generate a control signal based on an input signal, and an initializer to generate the input value based on the period, wherein the input value causes the oscillator to generate the control signal having the same phase as the operating signal.
US07960934B2
A fault-tolerant position feedback filter may be used in an actuation control system to limit the authority of a first position signal, should the first position signal become erroneous, and thereby prevent a postulated runaway condition of an acuator. The filter includes a difference function, a limited integrator, and a summer. The difference function supplies a first position error signal representative of a mathematical difference between a first position signal and a combined position signal. The limited integrator supplies an integrated position error signal that is limited in magnitude to a predetermined limit. The summer supplies the combined position error signal that is representative of a mathematical sum of the integrated position error signal and the second position signal.
US07960933B2
A P-range side delimiting position of a movable range of a range change mechanism is learned by rotating a motor to a corresponding rotational position, which corresponds to the P-range side delimiting position. A climb correction amount is set for a learning value of the P-range side delimiting position to correct the learning value of the P-range side delimiting position in view of presence of a relatively small angle of rotation of the motor beyond the corresponding rotational position, which corresponds to the P-range side delimiting position. The climb correction amount is set according to motor temperature information, which is one of a temperature of the motor and a temperature that relates to the temperature of the motor.
US07960928B2
A motor in an electric vehicle can be controlled by receiving at least one of a user input or vehicle information, selecting one of a plurality of available flux modes using at least one of the user input or the vehicle information, and calculating a control signal, using the selected flux mode, to control the motor of the electric vehicle.
US07960927B2
An electric motor control device includes a power supply unit that supplies power to a three-phase electric motor; a three-phase current sensor that individually detects three respective phase currents of the three-phase electric motor; a summing unit that calculates a three-phase sum by adding the three phase currents detected by the three-phase current sensor; a detected current correction unit that calculates correction amounts for at least two of the three phase currents based on a phase and an amplitude of the three-phase sum and then corrects phase current detection values by the calculated correction amounts; and a motor control unit that controls a power supply by the power supply unit to the three-phase electric motor by feedback control based on the three phase currents after correction by the detected current correction unit and on target currents.
US07960923B2
A discharge lamp lighting apparatus includes a discharge container, a pair of electrodes and a power supply apparatus. An alternating current of a frequency, which is lower than stationary frequency, is inserted periodically into the alternating current of stationary frequency. When a lighting current value of the discharge lamp is smaller than a predetermined lower limit, the frequency is set as predetermined minimum frequency. When the lighting current value of a discharge lamp is larger than a predetermined maximum value, the frequency is set as predetermined maximum frequency. When a lighting current value of the discharge lamp is between the lower limit and the maximum value, the frequency is set as a selected frequency corresponding to the lighting current value. The selected frequency increases according to an increase of frequency change as a lighting current value increases.
US07960921B2
An apparatus according to the present invention provides regulated pulsed current to an LED from a voltage source such as a rectified AC voltage. The present inventions provide methods for delivering regulated pulsed current to an LED from the voltage source.
US07960917B2
A light emitting device is provided which is capable of displaying in desired colors stably by controlling a change in luminance of OLED when an organic light emitting layer is degraded or there is a change in temperature of the surroundings. A reference value for the amount of current flowing into a pixel portion is calculated from data of a video signal. Then, the pixel portion displays an image in accordance with the data of the video signal and the drive current at the time is measured for all of OLEDs in the pixel portion. The two voltage values supplied from a variable power supply to the pixel portion are corrected such that the measured drive current approaches the reference value. With the above structure, lowering of luminance which accompanies degradation of an organic light emitting layer is prevented and a clear image can be displayed as a result.
US07960912B2
A light-emitting device includes a cathode, an anode, a first light-emitting layer that is disposed between the cathode and the anode and that emits light of a first color, a second light-emitting layer that is disposed between the first light-emitting layer and the cathode and that emits light of a second color different from the first color, and an intermediate layer that is disposed between and in contact with the first light-emitting layer and the second light-emitting layer and that functions to prevent energy transfer of excitons between the first light-emitting layer and the second light-emitting layer. The intermediate layer includes a first intermediate layer disposed in contact with the first light-emitting layer and mainly containing a first intermediate material and a second intermediate layer disposed in contact with the second light-emitting layer and mainly containing a second intermediate material different from the first intermediate material.
US07960903B2
An electron emission source-forming composition includes a carbon-based material; a vehicle composed of a resin component and a solvent component; and at least one metal oxide with an average particle diameter in a range of 100 to 1,000 nm selected from Al2O3, TiO2, and SiO2. The electron emission source-forming composition is sintered under an air atmosphere during electron emission source formation. Therefore, carbon deposits after sintering and degradation of Carbon Nano-Tubes (CNTs) upon sintering can be remarkably reduced. As a result, the electron emission source formed using the composition has a high current density and the electron emission device using the electron emission source exhibits enhanced reliability.
US07960899B2
A piezoelectric multilayer component has a base body with a stack of piezoceramic layers and electrode layers arranged one on top of the other in an alternating manner. Neighboring layers of the stack are braced against one another such that stresses run perpendicular to the stacking direction.
US07960893B2
Provided are a radial core type brushless direct-current (BLDC) motor and a method of making the same, having an excellent assembly capability of division type stator cores in a double rotor structure BLDC motor. The BLDC motor includes a rotational shaft, an integrated double rotor including an inner rotor and an outer rotor, and a rotor supporter wherein a trench type space is formed between the inner rotor and the outer rotor, and an end extended from the inner rotor is connected with the outer circumferential surface of a bushing combined with the rotational shaft, and an integrated stator wherein one end of the stator is disposed in the trench type space and an extension axially extended from the other end of the integrated stator is fixed to the housing of the apparatus. In the integrated stator, U, V, W phase coil assemblies are formed of a number of core groups including a number of division type cores, wherein for each phase coil assembly, the division type core groups of the U, V, W phase coil assemblies are alternately disposed in an annular form in sequence of the phases, and the respective division type core groups are integrally formed into a single body in annular form by a stator support.
US07960891B2
A power tool has an electric motor that includes a commutator, with which at least one commutator brush is acted upon with spring force via at least one commutator spring in the direction of a non-rotatable collector of the commutator. At least one auxiliary tool for adjusting the commutator spring is located on a component of the power tool.
US07960882B2
A motor may include a bearing for supporting a rotation shaft, a bearing holder which is formed with a bearing holding hole on which the bearing is mounted, and a spring member which is mounted on an outer end face of the bearing holder for urging the bearing toward the rotation shaft. The spring member includes a plurality of hook parts which engages with an inner end face of the bearing holder through an outer peripheral side of the bearing holder, and a portion of the inner end face of the bearing holder is formed with a recessed engaging part with which the plurality of the hook parts is engaged. The recessed engaging part includes a cut-out part which reaches to an aperture edge of the bearing holding hole.
US07960879B2
An airplane engine accessory box carrying an electrical machine such as an alternator, having a rotor that is guided in rotation in a bearing carried by a support part made of a material having a low coefficient of thermal expansion, itself carried by a stator cover that acts as a heat bridge between the body of the stator of the electrical machine and the casing of the accessory box.
US07960876B2
A magnet rotor includes a drive arm with a rotary shaft, and an anisotropic permanent magnet having an axis of magnetization. The drive arm is composed of a light transmitting resin. The magnet has a cylindrical shape with a hollow center portion through which the rotary shaft is disposed. The drive arm and the permanent magnet are bonded together by a light curable resin adhesive.
US07960869B2
An electrical distribution system is provided for selectively connecting an electrical power source to load devices comprising a panelboard having a plurality of load circuit positions. A remote operated device is mountable in the panelboard comprising a load control device, and a device control for controlling the load control device. The device control comprises a programmed controller for operating the load control device responsive to control commands and a communication circuit for receiving control commands. An input/output (I/O) controller is mounted in the panelboard for controlling operation of the remote operated device, the I/O controller comprising a programmed controller for generating the control commands for commanding operation of the remote operated device, the control system including a communication circuit for communication with the remote operated device communication circuit.
US07960866B2
A pulse generation circuit for outputting a pulse with a predetermined waveform to an output terminal in response to a start signal includes a circuit adapted to generate a plurality of signals {Di|i denotes an integer in a predetermined range}, which has predetermined amounts of time differences from the start signal, based on the start signal, a plurality of power supplies {Ej|j denotes an integer} adopted to supply electric energy of a predetermined electric quantity, and a switching circuit adapted to sequentially switch the power supplies {Ej} in a predetermined order in accordance with logical function values of at least a part of the signals {Di} to connect the power supplies {Ej} to the output terminal.
US07960860B2
In a particular embodiment, a circuit device is disclosed that includes a power sourcing equipment (PSE) circuit having a plurality of high-voltage line circuits adapted to communicate with a respective plurality of powered devices via network cables. The PSE circuit includes a serial interface circuit and includes a common controller coupled to the serial interface circuit and to the plurality of high-voltage line circuits. The circuit device also includes a low-voltage circuit having a programmable controller adapted to transmit control signals to the common controller via the serial interface circuit to control operation of the plurality of high-voltage line circuits.
US07960857B2
A system and method for controlling a vehicle-based source of uninterruptable power is disclosed. The vehicle-based UPS includes an energy storage system located on-board a vehicle and configured to generate DC power transferable to an external load, and an DC-AC inverter connected to the on-board energy storage system to receive the DC power therefrom and invert the DC power to an AC power useable by the external load. The vehicle-based UPS also includes a charging device located on-board the vehicle and connected to the on-board energy storage system to provide recharging power thereto and a control system. The control system is configured to determine one of a state-of-charge (SOC) and a voltage of the energy storage system and selectively operate the charging device to provide the recharging power to the energy storage system to maintain the SOC or voltage of the energy storage system within a pre-determined range.
US07960850B2
The invention relates to a system of at least two distributed wind turbines where the at least two wind turbines communicate via a data communication network, the data communication network communicates monitoring and control data (MCD) to and from the at least two wind turbines (WT), the data communication network communicates power control related data (PCRD) to and from the at least two wind turbines (WT), the power control related data (PCRD) has higher transmission priority than a subset of the monitoring and control data (MCD) and where the transmission priority is defined in relation to a protocol.
US07960849B2
Method and system of control of the converter of an electricity generation facility of the type which comprises at least one electric generator, such as a wind generator, connected to an electricity network, in the presence of voltage sags in said network, the electric generator being a double-fed asynchronous generator formed by two windings, a winding in the stator, directly connected to the network, and a winding in the rotor which is fed on normal regime by said converter which imposes on it a predetermined voltage current called setpoint current. In the event of a voltage sag occurring, the converter imposes a new setpoint current which is the result of adding to the previous setpoint current a demagnetizing current which generates a flow in the rotor winding opposed to the free flow, consequently reducing the voltage in converter connectors.
US07960841B2
A semiconductor device is manufactured by, first, providing a wafer designated with a saw street guide. The wafer is taped with a dicing tape. The wafer is singulated along the saw street guide into a plurality of dies having a plurality of gaps between each of the plurality of dies. The dicing tape is stretched to expand the plurality of gaps to a predetermined distance. An organic material is deposited into each of the plurality of gaps. A top surface of the organic material is substantially coplanar with a top surface of a first die of the plurality of dies. A plurality of via holes is formed in the organic material. Each of the plurality of via holes is patterned to each of a plurality of bond pad locations on the plurality of dies. A conductive material is deposited in each of the plurality of via holes.
US07960831B2
A ball-limiting metallurgy (BLM) stack is provided for an electrical device. The BLM stack resists tin migration toward the metallization of the device. A solder system is also provided that includes a eutectic-Pb solder on a substrate that is mated to a high-Pb solder, and that withstands higher temperature reflows and other higher temperature processes.
US07960830B2
An electronic assembly comprising a first substrate, a number of bonds on the first substrate, a second substrate spaced apart from the first substrate, a number of bumps on the second substrate, each of the bumps including an insulating body and a conductive portion, the conductive portion extending from a top surface of the insulating body via at least one sidewall of the insulating body toward the second substrate, and an adhesive between the first substrate and the second substrate, the adhesive including an insulating layer and a conductive layer, the insulating layer and the conductive layer being laminated with respect to each other, wherein the insulating layer is positioned closer to the first substrate than the conductive layer.
US07960828B2
The carrier frame relating to the present invention comprises a base layer member, a frame layer member, and a positioning layer member having multiple openings for storing electronic components. A spring layer member is mounted in a hollow part surrounded by the frame layer member between the positioning layer member and the base layer member. At each opening of the spring layer member, a small spring providing an elastic force for fastening the electronic components between an edge of the corresponding opening of the positioning layer member and the small spring is formed integrally with the spring layer member. At one end in the longitudinal direction of the spring layer member, a large spring providing an elastic force along the longitudinal direction by being in contact with an inner surface of the frame layer member in the mounted state is formed integrally with the spring layer member.
US07960827B1
A thermal via heat spreader package includes an electronic component having an active surface including a nonfunctional region. A package body encloses the electronic component, the package body comprising a principal surface. Thermal vias extend from the principal surface through at least a portion of the package body and towards the nonfunctional region. A heat spreader is thermally connected to the thermal vias. Heat generated by the electronic component is dissipated to the thermal vias and to the heat spreader. The density of the thermal vias is increased in a hotspot of the electronic component thus maximizing heat transfer from the hotspot. In this manner, optimal heat transfer from the electronic component is achieved.
US07960819B2
A modular package for a light emitting device includes a leadframe having a top surface and including a central region having a bottom surface and having a first thickness between the top surface of the leadframe and the bottom surface of the central region. The leadframe may further include an electrical lead extending away from the central region. The electrical lead has a bottom surface and has a second thickness from the top surface of the leadframe to the bottom surface of the electrical lead. The second thickness may be less than the first thickness. The package further includes a package body on the leadframe surrounding the central region and exposing the bottom surface of the central region. The package body may be at least partially provided beneath the bottom surface of the lead and adjacent the bottom surface of the central region. Methods of forming modular packages and leadframes are also disclosed.
US07960818B1
In accordance with the present invention, there is provided a punch quad flat no leads (QFN) semiconductor package including a leadframe wherein the leads of the leadframe are selectively half-etched so that only one or more prescribed leads may be electrically connected to a conformal shield applied to the package body of the semiconductor package. The conformal shield may be electrically connected to the exposed lead(s) alone, or in combination with one or more tie bars of the leadframe. In one embodiment, outer end portions of the top surfaces of the leads of the semiconductor package are alternately exposed and non-exposed, with the non-exposed leads including a top side half-etch which causes the same to be effectively covered by the package body of the semiconductor package.
US07960815B2
A semiconductor package includes a leadframe. A first lead finger has a lower portion, a connecting portion extending vertically upward from the lower portion, and a substantially flat, top portion. The top portion forms a top terminal lead structure. A second lead finger is electrically connected to the first lead finger. A portion of the second lead finger forms a bottom terminal lead structure. A portion of the second lead finger corresponds to a bottom surface of the semiconductor package. A surface of the substantially flat, top portion corresponds to a top surface of the semiconductor package.
US07960813B2
A programmable resistance memory element and method of forming the same. The memory element includes a first electrode, a dielectric layer over the first electrode and a second electrode over the dielectric layer. The dielectric layer and the second electrode each have sidewalls. A layer of programmable resistance material, e.g., a phase change material, is in contact with the first electrode and at least a portion of the sidewalls of the dielectric layer and the second electrode. Memory devices including memory elements and systems incorporating such memory devices are also disclosed.
US07960790B2
A double-gate transistor having front (upper) and back gates that are aligned laterally is provided. The double-gate transistor includes a back gate thermal oxide layer below a device layer; a back gate electrode below a back gate thermal oxide layer; a front gate thermal oxide above the device layer; a front gate electrode layer above the front gate thermal oxide and vertically aligned with the back gate electrode; and a transistor body disposed above the back gate thermal oxide layer, symmetric with the first gate. The back gate electrode has a layer of oxide formed below the transistor body and on either side of a central portion of the back gate electrode, thereby positioning the back gate self-aligned with the front gate. The transistor also includes source and drain electrodes on opposite sides of said transistor body.
US07960782B2
A nitride semiconductor device includes: a nitride semiconductor structure portion including a first layer made of an n-type group III nitride semiconductor, a second layer made of a group III nitride semiconductor containing a p-type impurity provided on the first layer and an n-type region formed on a part of the second layer, and having a wall surface extending over the first layer, a body region of the second layer other than the n-type region and the n-type region; a gate insulating film formed such that the gate insulating film is opposed to the body region on the wall surface; a gate electrode formed such that the gate electrode is opposed to the body region through the gate insulating film; a source electrode formed such that the source electrode is electrically connected to the n-type region; a drain electrode formed such that the drain electrode is electrically connected to the first layer; and a body electrode formed such that the body electrode is electrically connected to the body region.
US07960772B2
An RF switch to controllably withstand an applied RF voltage Vsw, or a method of fabricating such a switch, which includes a string of series-connected constituent FETs with a node of the string between each pair of adjacent FETs. The method includes controlling capacitances between different nodes of the string to effectively tune the string capacitively, which will reduce the variance in the RF switch voltage distributed across each constituent FET, thereby enhancing switch breakdown voltage. Capacitances are controlled, for example, by disposing capacitive features between nodes of the string, and/or by varying design parameters of different constituent FETs. For each node, a sum of products of each significant capacitor by a proportion of Vsw appearing across it may be controlled to approximately zero.
US07960767B2
The present invention provides providing a substrate, forming a sensor array on the substrate, forming a structured array of uncommitted logic surrounding the sensor array on the substrate, and providing electrical interconnects to the structured array of uncommitted logic, wherein the structured array of uncommitted logic forms functions that support the operation of the sensor array.
US07960755B2
In a transistor in which the majority carriers are holes, at least one narrow bandgap region or layer is doped p-type or contains an excess of holes and is subject to compressive mechanical strain, whereby hole mobility may be significantly increased. In a p-channel quantum well FET, the quantum well InSb well p-type layer 5 (modulation or directly doped) lies between In1-xAlxSb layers 4, 6 where x is of a value sufficient to induce strain in layer 5 to an extent that light and heavy holes are separated by much more than kT. Transistors falling within the invention, including bipolar pnp devices, may be used with their more conventional electron majority carriers counterparts in complementary logic circuitry.
US07960754B2
A Schottky or PN diode is formed where a first cathode portion is an N epitaxial layer that is relatively lightly doped. An N+ buried layer is formed beneath the cathode for conducting the cathode current to a cathode contact. A more highly doped N-well is formed, as a second cathode portion, in the epitaxial layer so that the complete cathode comprises the N-well surrounded by the more lightly doped first cathode portion. An anode covers the upper areas of the first and second cathode portions so both portions conduct current when the diode is forward biased. When the diode is reverse biased, the depletion region in the central N-well will be relatively shallow but substantially planar so will have a relatively high breakdown voltage. The weak link for breakdown voltage will be the curved edge of the deeper depletion region in the lightly doped first cathode portion under the outer edges of the anode. Therefore, the N-well lowers the on-resistance without lowering the breakdown voltage.
US07960753B2
A surface plasmon polaritron activated semiconductor device uses a surface plasmon wire that functions as an optical waveguide for fast communication of a signal and functions as a energy translator using a wire tip for translating the optical signal passing through the waveguide into plasmon-polaritron energy at a connection of the semiconductor device, such as a transistor, to activate the transistor for improved speed of communications and switching for preferred use in digital systems.
US07960745B2
A light emitting device comprises a light emitting layer section having a double heterostructure of an n-type cladding layer, an active layer and a p-type cladding layer, each composed of AlGaInP stacked in this order. Supposing a bonding object layer having a first main surface side as p type and a second main surface side as n type, a light extraction side electrode is formed to cover the first main surface partially. An n-type transparent device substrate composed of Group III-V compound semiconductor having greater band gap energy than the active layer is bonded to the second main surface of the bonding object layer. On one sides of the transparent device substrate and the bonding object layer, a bonding surface to the other is formed, and an InGaP intermediate layer is formed to have a high concentration Si doping layer formed on the bonding surface side.
US07960736B2
The present invention relates to a semiconductor-on-insulator structure including a semiconductor component comprised of substantially single-crystal semiconductor material layer and a single-crystal semiconductor material with an enhanced oxygen content layer; an oxide glass material layer; and a glass-ceramic layer.
US07960726B2
A method of depositing a film of a metal chalcogenide including the steps of: contacting an isolated hydrazinium-based precursor of a metal chalcogenide and a solvent having therein a solubilizing additive to form a solution of a complex thereof; applying the solution of the complex onto a substrate to produce a coating of the solution on the substrate; removing the solvent from the coating to produce a film of the complex on the substrate; and thereafter annealing the film of the complex to produce a metal chalcogenide film on the substrate. Also provided is a process for preparing an isolated hydrazinium-based precursor of a metal chalcogenide as well as a thin-film field-effect transistor device using the metal chalcogenides as the channel layer.
US07960724B2
Provided are a composition for organic thin film transistors including a material including an anthracenyl group and a cross-linker including a maleimide group, an organic thin film transistor formed by using the composition, and a method for manufacturing the same.
US07960710B2
Particle radiation therapy equipment arranged to apply a charged particle beam in a predetermined direction to a region of application within an imaging volume, comprising a charged particle beam source arranged to direct a charged particle beam in the predetermined direction, further comprising magnetic field generation means for generating a magnetic field in the region of application at the same time that the charged particle beam is applied, wherein the magnetic field generation means is arranged to provide access to the region of application for the charged particle beam, and to provide a homogeneous magnetic field in the region of application of the charged particle beam, said magnetic field being directed substantially in the predetermined direction.
US07960697B2
The present invention relates to a charged particle beam apparatus which employs a scanning electron microscope for sample inspection and defect review.The present invent provides solution of improving imaging resolution by utilizing a field emission cathode tip with a large tip radius, applying a large accelerating voltage across ground potential between the cathode and anode, positioning the beam limit aperture before condenser lens, utilizing condenser lens excitation current to optimize image resolution, applying a high tube bias to shorten electron travel time, adopting and modifying SORIL objective lens to ameliorate aberration at large field of view and under electric drifting and reduce the urgency of water cooling objective lens while operating material analysis.The present invent provides solution of improving throughput by utilizing fast scanning ability of SORIL and providing a large voltage difference between sample and detectors.
US07960686B2
A radiographic calibration apparatus for supporting a calibration unit. The radiographic calibration apparatus includes a support structure, and this support structure or arrangement is used to support and selectively position the calibration unit with respect to a patient. A retaining member for use in connection with a calibration unit is also disclosed.
US07960681B2
A method and system for scanning a multiple light beam system, such as a safety light curtain, uses a plurality of transmission signals including two or more synchronization signals for synchronizing a beam receiver module with a beam transmission module. The system has transmitter circuitry which generates the transmission signals for driving light sources of the transmission module and receiver circuitry which receives corresponding transmitted signals. The receiver circuitry generates a scanning initialization signal using an uninterrupted synchronization signal among the reception signals for synchronizing the receiver module with the transmission module and scans the receiver module in response to generation of the scanning initialization signal.
US07960664B2
A purpose of the present invention is to provide a seesaw switch that has a simple structure with improved opearatability. In order to achieve the purpose, a seesaw switch 1 includes pressing sections each located at corresponding locations of operated sections of a pair of switch elements; a rotation operating member that is rotationally displaced; pressure transmitting members that are respectively provided between the pressing sections and operated sections; and a guide member that guides the pressure transmitting members to contacting and separating directions with respect to the operated sections, when the pressing sections are rotationally displaced. The seesaw switch also includes viscous material that is provided between the pressing sections and the pressure transmitting members. The viscous material has viscosity that allows inclination of the pressing sections toward the pressure transmitting members, while enabling the pressure transmitting members to follow the rotational displacement of the pressing sections.
US07960659B2
A trailer tongue weight measurement system is provided to ensure proper loading and safe handling of a trailer being towed by a vehicle. The weight measurement system includes a two part or split housing having a operating shaft, a spring and a scale. The weight measurement system may be incorporated into the trailer tongue, the tongue jack, or the hitch. Deflection of the spring in response to a load on the trailer is converted to a weight measurement that may be read on a calibrated scale.
US07960658B2
A balance (1) has a balance housing (2), which, when the balance is set up for operation, has an opening at its topside to pass a load-introducing member (4). The housing has a draft shield arrangement (5), separable from, and attachable to, the housing. An opening (7) on a floor (6) of the draft shield arrangement corresponds to the housing opening and allows the load-introducing member to pass. A design that facilitates cleaning while keeping the height of the balance low is achieved with a fastening arrangement (8) for the draft shield arrangement. The fastening arrangement allows the draft shield arrangement to be fastened centrally at the load-introducing member passage. A rim on the housing opening operates as a first part (8′) and provides a form-locking connection with a second part that is attached to the draft shield arrangement at the draft shield floor opening.
US07960657B2
An electrical device has a housing and a housing surface, at least one electrical conductor accommodated in said housing and interrupting said housing surface in sections so that said housing surface is interrupted, a conductive body which covers said conductor on said interrupted housing surface, and at least two spacers which keep said conductive body apart from said at least one conductor.
US07960656B2
Enclosures for at least partially shielding an at least partially enclosed volume from electromagnetic interference and various methods for producing such enclosures are described. Enclosures for at least partially shielding an at least partially enclosed volume from electromagnetic interference may be prepared by bonding at least two sections of carbon foam with a carbonizable binder to provide an enclosure, wherein said enclosure defines an at least partially enclosed volume, and carbonizing the carbonizable binder to provide an electrically conductive carbon char. An enclosure for at least partially shielding an at least partially enclosed volume from electromagnetic interference may include at least two sections of electrically conductive carbon foam interconnected by an electrically conductive carbon char. The electrically conductive carbon char is substantially electrically continuous with the sections of electrically conductive carbon foam.
US07960648B2
A cable assembly for use with any power cable for an electrical device, the cable assembly including a remotely locatable switch for connecting or disconnecting the electrical device from power draw. Also, a cable assembly for a power device such as a charger for providing output power to an electronic device is disclosed, the cable assembly including two pairs of wires wherein a first pair provides output power for the electronic device and a second pair includes a switch for turning off the charger. The cable assembly allows the switch to be located remotely from a charger housing for the converter circuitry and remotely from a power source such as an outlet, and allows the switch to be generally co-located with and operable at the connector for connecting the power device with the electronic device.
US07960643B2
Provided are novel back sheets for solar module encapsulation. According to various embodiments, the back sheets are ungrounded and flexible. In certain embodiments, the back sheets include an integrated flexible and electrically isolated moisture barrier. The electrically isolated moisture barrier may be a thin metallic sheet, e.g., an aluminum foil. The electrically isolated, flexible moisture barrier eliminates the need for grounding.
US07960640B2
A system for control signal generation using detected dynamic characteristics of components of an incoming electronic signal. Fixed or adjustable bandpass filters are coupled to signal parameter measurement elements. Each filter isolates a particular overtone component from the incoming electronic signal for isolated signal parameter measurement. Pitch and amplitude of a plurality of overtones may be individually measured. A control signal processor generates one or more outgoing control signals based upon one or more isolated overtone parameter signals. The control signal processor may use these to generate individual associated output signals, subject to optional mathematical operations and warpings, or combine measured parameters of several overtones via mathematical operations to other output signals. The invention may be used to enhance audio-to-MIDI converters, or as an add-on to a traditional fundamental-pitch based audio-to-MIDI converters, giving musicians and vocalists valuable new levels of timbre control over audio synthesis and signal processing.
US07960634B2
A support system for an acoustic instrument has connecting elements of flexible material extending between and attaching the instrument and a support frame to support and/or balance the weight of the instrument and isolate acoustic frequencies, thereby eliminating deleterious acoustical effects. Embodied exemplarily herein as a support system for a drum, flexible elements extend between and attach the drum head hoop to a circular frame or support that fully or partially encircles the drum. The flexible elements may be made integral with the drum head and/or its head skin.
US07960632B2
Drum kits and connector assemblies for connecting components of drum kits are described. Some of the described connector assemblies are configured to provide one or more pre-defined acceptable interconnection orientations. Some of the described connector assemblies facilitate easy interconnection and disconnection of components of a drum kit. Described interconnection types include snap connections and locking interconnections, among others.
US07960631B1
A clarinet coupling structure comprises at least one first hollow tube and at least one second hollow tube that are fastenable by swiveling. The first hollow tube includes a first coupling portion and a plurality of first bumps located on the surface of the first coupling portion. The first bumps are spaced by a plurality of first gaps formed between them. The second hollow tube includes a second coupling portion and a plurality of second bumps located on the surface of the second coupling portion. The second bumps are spaced by a plurality of second gaps formed between them to receive the first bumps. The second gaps also have a plurality of lateral movement sections to allow the first bumps to slide in and latch inside. Through such a structure, various elements of wind instruments can be assembled and disassembled quickly and damage can also be prevented.
US07960630B2
A tremolo mechanism having a novel roller mounted beneath a tensioned string of a stringed musical instrument is described. During oscillatory movement, the tensioned string exerts both a static and a vibratory force on the roller. The roller rotates in relation to the tensioned string such that the static force is generally greater than any component of the vibratory force. The novel roller may be a saddle roller with a saddle block having two opposing block walls which form a roller cavity. The block walls each have a roller bore aligned along a roller axis. The saddle roller includes a cylindrical body attached to a roller pin and a circumferential seat receiving a tension string. The roller pin is rotatably disposed such that the saddle roller is in the saddle block cavity. The roller axis extends obliquely to define an oblique roller angle.
US07960626B2
According to the invention, there is provided seed and plants of the hybrid corn variety designated CH621142. The invention thus relates to the plants, seeds and tissue cultures of the variety CH621142, and to methods for producing a corn plant produced by crossing a corn plant of variety CH621142 with itself or with another corn plant, such as a plant of another variety. The invention further relates to genetic complements of plants of variety CH621142.
US07960619B1
According to the invention, there is provided a novel soybean variety designated RJS42001. This invention thus relates to the seeds of soybean variety RJS42001, to the plants of soybean RJS42001 to plant parts of soybean variety RJS42001 and to methods for producing a soybean plant produced by crossing plants of the soybean variety RJS42001 with another soybean plant, using RJS42001 as either the male or the female parent.
US07960606B2
An animal model has been developed where the animals can survive myocardial infarctions caused by diet-induced coronary atherosclerosis, and live with chronic heart failure. This animal model is a result of reduced activity of scavenger receptor class BI (SR-BI) and ApoE and the inducible activity of the Mx1-Cre gene. In a preferred embodiment, the model is a result of crossbreeding two transgenic mouse lines: a knockout of SR-BI (SRBI−/−) and an impaired ApoE expressor (Apoeh/h) to generate a strain referred to as Apoeh/hSRB1−/− mice, which is then crossbred to mice that carry the inducible Mx1-Cre transgene. The Apoeh/hSRB1−/− mouse model is genetically modified, enabling the offspring to rapidly and permanently lower their high blood cholesterol levels caused by dietary challenge. The ability to rapidly and permanently lower blood cholesterol levels in these mice stops and may cause the regression of occlusive coronary atherosclerosis restoring blood flow to the heart, allowing the mice to survive from myocardial infarction and live with chronic heart failure.
US07960602B2
The present invention provides a multilayer bandage, having a webbing for contacting a wound and a first membrane that has at least one water-insoluble polymer and is water-impervious. The present invention further provides methods for making the multilayer bandage, methods of using the multilayer bandage for accelerated wound healing, and kits having compositions of the present invention.
US07960586B2
The invention encompasses processes for obtaining pure armodafinil substantially free of disulfide impurities that is suitable for use on an industrial scale. In particular, a processes for purifying armodafinil from bis(diphenylmethyl)disulfide comprising: dissolving crude armodafinil in ethanol to form a solution; adding a solvent selected from the group consisting of linear or branched C5-C8 alkyl, linear or branched C5-C8 ether, and mixtures thereof to the solution to form a reaction mixture; cooling the reaction mixture; and isolating pure armodafinil from the reaction mixture.
US07960582B2
The present invention relates to a new process for the resolution of mandelic acid derivatives from racemic mandelic acid derivative mixtures by salt formation with chiral base cyclic amides; to the resolved mandelic acid cyclic amide salts (see, for example, formula IIa), as well as certain other metal and amine salts of the mandelic acid derivatives, and to the use of the resolved mandelic acid derivatives as intermediates suitable for large-scale manufacturing of, for example, pharmaceutical compounds; Formula IIa, wherein R is selected from CHF2, H, C1-6 Alkyl, CH2F, CHCl2 and CClF2; and wherein n is 0, 1 or 2; R1 is H or C1-6 Alkyl and X is H, halo or C1-6 Alkyl.
US07960578B2
The disclosure relates to a method for the synthesis of a compound of the formula (I) in which: n is an integer higher than or equal to 1; Rb and each Rn are independently a hydrogen atom, a C1-C6 arylalkyl group or a C1-C6 alkyl group substituted or not by an aryl group, —COOH, C1-C6, —COO-(alkyl), —CONH2, —SH, heteroaryl, —NH2, —NHC(NH)(NH2), C1-C6-s-(alkyl), —OH or phenol; Ra is a N-protective group; Rc is a ORd group in which Rd is a C1-C6 alkyl group or a NReRf group in which Re and Rf Re independently an N-protective group.
US07960577B2
Organosilicon compounds having organyloxy groups are prepared by reacting an organosilicon compound (A) having at least one silanol group with a compound (B) containing at least two organyloxy groups in the presence of a component (C) comprising a zinc chelate (C1) and at least one additive (C2) selected from the group consisting of compounds containing basic nitrogen (C21) and alcohols (C22). The products are useful in compositions which crosslink at room temperature.
US07960572B2
The present invention relates to a process for the preparation of Nebivolol and, more particularly, to an improved method of synthesizing 6-fluoro chroman epoxides of formula (I) key intermediates in preparing nebivolol.
US07960570B2
This invention relates to neurotrophic compounds having an affinity for FKBP-type immunophilins, their preparation and use as inhibitors of the enzyme activity associated with immunophilin proteins, and particularly inhibitors of peptidyl-prolyl isomerase or rotamase enzyme activity.
US07960566B2
An anthracene derivative is disclosed, and a light-emitting element, a light-emitting device, an electronic device, and a lighting device using the anthracene derivatives are demonstrated. The structure of the anthracene derivative is described in detail in the specification. The use of the anthracene derivative enables the production of a blue emissive light-emitting element having high emission efficiency, excellent purity of emission color, and a long lifetime, which contributes to the production of a high-performance light-emitting device, electronic device, and lighting device.
US07960564B2
N-[4-(3-Amino-1H-indazol-4-yl)phenyl]-N′-(2-fluoro-5-methylphenyl)urea Crystalline Form 1, ways to make it, formulations comprising it and made with it and methods of treating patients having disease using it are disclosed.
US07960563B2
The present invention relates to novel indazole derivatives having pharmacological activity, processes for their preparation, compositions containing them and uses of these compounds in the treatment of estrogen receptor beta mediated diseases.
US07960557B2
Asymmetric light-emitting dendrimers having the formulae: (a) CORE-[DENDRITE1]n[DENDRITE2]m and (b) CORE-[DENDRITE]n are disclosed.
US07960526B2
The present invention provides for reagents for the introduction of colorimetric-oxycarbonyl protecting groups, compounds bearing colorimetric-oxycarbonyl protecting groups, and the use thereof in solid-supported organic syntheses of oligonucleotides, polypeptides, polysaccharides, and combinatorial libraries.
US07960523B2
This invention relates to processes for production of alkylamino glucosaminide phosphate compounds, and of disaccharide compounds, including various novel intermediates and intermediate processes. In one aspect, glycosyl halides are produced by reaction of an O-silyl glycoside with a dihalomethyl alkyl ether.
US07960519B2
A method of treating biologic material with a composition containing at least one fatty acid derivative and/or at least one fatty alcohol, a buffer, and a salt to result in protein partitioning into an aqueous phase and an organic phase. The protein may be a membrane protein. The cells may be plant cells and/or animal cells. The proteins can be thereafter be used for downstream applications.
US07960505B2
The present invention provides isolated lantibiotics that inhibit Gram negative and Gram positive microbes. The lantibiotic includes an amino acid sequence, wherein the amino acid sequence of the compound and the amino acid sequence of SEQ ID NO:21 or SEQ ID NO:22 have at least 80% identity. The lantibiotics have the characteristic of inhibiting growth of a Gram negative microbe in conditions that do not damage the outer membrane of the Gram negative microbe. The present invention also provides methods for making and using the lantibiotics.
US07960502B2
The invention provides a sterically hindered polymer that comprises a water-soluble and non-peptidic polymer backbone having at least one terminus covalently bonded to an alkanoic acid or alkanoic acid derivative, wherein the carbon adjacent to the carbonyl group of the acid or acid derivative group has an alkyl or aryl group pendent thereto. The steric effects of the alkyl or aryl group allow greater control of the hydrolytic stability of polymer derivatives. The polymer backbone may be poly(ethylene glycol).
US07960495B2
(Meth)acrylate/aspartate amine curatives comprising the reaction product of a polyamine, a dialkyl maleate and/or dialkyl fumarate, and a (meth)acrylate are disclosed, as are methods for making the same. A polyurea comprising the reaction product of the acrylate/aspartate amine curative and isocyanate is also disclosed, as are coatings comprising such a polyurea and substrates coated with the same.
US07960490B2
The present invention relates to a process for producing water-absorbing polymeric particles by polymerizing a monomer solution comprising at least one ethylenically unsaturated acid-functional monomer less than 55 mol % neutralized and drying the resulting polymeric gel by means of a heated gas stream in at least two temperature zones.
US07960480B2
In a process for the manufacture of fluoroelastomers, a water-soluble polymeric coagulant is employed that is an aqueous solution of polyethyleneimine or its copolymers.
US07960465B2
The present invention relates to contact lenses comprising at least one ionizable antimicrobial metal compound and a polymer formed from a reaction mixture comprising at least one hydrophobic component and hydrophilic components in a concentration to provide a hydrophilicity index of at least 42.
US07960457B2
Disclosed herein is an aqueous mixture curable physically, thermally or both thermally and with actinic radiation, comprising (A) at least one polyurethane binder, which is ionically stabilized, nonionically stabilized, or a combination thereof, and which is saturated, unsaturated, grafted with olefinically unsaturated compounds, or a combination thereof; (B) at least one pigment, which is a color pigment, effect pigment, or a combination thereof; and (C) at least one phosphoric ester of the general formula (R1ORO)3P═O, wherein R is an alkanediyl group comprising 2 to 10 carbon atoms and R1 is an alkyl group comprising 2 to 10 carbon atoms. Also disclosed is a process for preparing the foregoing aqueous mixture, and color and/or effect thermoset or thermoplastic materials comprising the same.
US07960453B2
Crosslinking systems suitable for use in a polymer melt composition wherein the polymer melt composition comprises a hydroxyl polymer; polymeric structures made from such polymer melt compositions; and processes/methods related thereto are provided.
US07960451B2
A polyamide masterbatch free from metal copper deposition and metal corrosion in an extruder or a molding machine, deterioration in mechanical physical properties of the product, and a color change of appearance due to water absorption and having improved heat aging resistance is produced by mixing, by melt kneading, a) 100 parts by weight of a polyamide having a water content of from 0.05 to 2.0 wt. %, b) from 0.1 to 10 parts by weight of an organic compound having at least one amide group, c) from 0.1 to 5 parts by weight of a copper compound having a maximum particle size of 50 μm or less, and d) from 1 to 50 parts by weight of a halogen compound (with the proviso that a copper halide is excluded) having a maximum particle size of 50 μm or less.
US07960448B2
A method for producing a puncture sealant, including: performing a first mixing to mix an anti-freezing agent and water; performing a second mixing to mix a mixed liquid obtained from the first mixing and a rubber latex; and performing a third mixing to mix a mixed liquid obtained from the second mixing and an adhesive agent.
US07960447B2
The present invention relates to hydrophilic dicationic siloxane prepolymers with one polymerizable vinyl moiety instead of two polymerizable vinyl moieties, resulting in contact lenses and/or biomedical devices with reduced cross-link density and modulus without detracting from other properties.
US07960433B2
Methods of treating chemokine-mediated diseases are disclosed. The methods comprise the administration of CXC-Chemokine receptor antagonists of the formula or pharmaceutically acceptable salts or solvates thereof, in combination with other classes of pharmaceutical compounds. The chemokine-mediated diseases include acute and chronic inflammatory disorders, psoriasis, cystic fibrosis, asthma and cancer. Also disclosed are novel compounds of formula (I).
US07960429B2
The present invention concerns methods useful in treating a subject having diarrhea-predominant IBS (IBS-D) by administering N methyl-N-[(1S)-1-phenyl-2-((3S)-3-hydroxypyrrolidin-1-yl)ethyl]-2,2-diphenylacetamide and/or a pharmaceutically acceptable salt thereof to the subject.
US07960412B2
The present invention provides a compound represented by the following formula (I); [wherein T represents a single bond, a C1-C4 alkylene group which may have a substituent and the like; (I-1) formula (I-1) represents a single bond or a double bond; A represents a single bond, a bivalent 5- to 14-membered heterocyclic group which may have a substituent and the like; Y represents a single bond and the like; Z represents a methylene group and the like; ring G represents a phenylene group and the like which may condense with a 5- to 6-membered ring and may have a heteroatom; Ra and Rb are the same as or different from each other and represent a hydrogen atom and the like; W represents a single bond and the like; R′ represents 1 to 4 independent hydrogen atoms and the like; and R″ represents 1 to 4 independent hydrogen atoms and the like] or a salt thereof, or a hydrate thereof.
US07960403B2
Compounds according to formula (I): wherein A, R1, R2 and R3 are defined as defined herein, and the pharmaceutically acceptable salts, hydrates and solvates thereof, are useful for the modulation of CCR5 chemokine receptor activity.
US07960398B2
The present invention relates to methods for identifying compounds useful for regulating TNF-alpha levels and/or activity. The invention also relates to methods for decreasing TNF-alpha levels and/or activity. Compounds and compositions according to this invention are useful for treating TNF-mediated diseases. The invention also relates to kits comprising the compounds and compositions herein and a tool for measuring TNF-alpha activity and/or levels.
US07960393B2
The present invention relates to a pyrimidine derivative of the formula (I) and salts thereof which is useful as an active ingredient of pharmaceutical preparations. The pyrimidine derivative of the present invention has excellent CRTH2 (G-protein-coupled chemoattractant receptor, expressed on Th2 cells) antagonistic activity and can be used for the prophylaxis and treatment of diseases associated with CRTH2 activity, in particular for the treatment of allergic diseases, such as asthma, allergic rhinitis, atopic dermatitis, and allergic conjunctivitis; eosinophil-related diseases, such as Churg-Strauss syndrome and sinusitis; basophil-related diseases, such as basophilic leukemia, chronic urticaria and basophilic leukocytosis in human and other mammals; and inflammatory diseases characterized by T lymphocytes and profuse leukocyte infiltrates such as psoriasis, eczema, inflammatory bowel disease, ulcerative colitis, Crohn's disease, COPD (chronic obstructive pulmonary disorder) and arthritis.
US07960391B2
A compound of general formula (I): A process for preparing this compound.A fungicide composition comprising a compound of general formula (I).A method for treating plants by applying a compound of general formula (I) or a composition comprising it.
US07960383B2
The invention relates to new therapeutically useful pyridazin-3(2H)-one derivatives of Formula (I) and to pharmaceutical compositions containing them. These compounds are potent and selective inhibitors of phosphodiesterase 4 (PDE4) and are thus useful in the treatment, prevention or suppression of pathological conditions, diseases and disorders known to be susceptible of being improved by inhibition of PDE4 such as asthma, chronic obstructive pulmonary disease, rheumatoid arthritis, atopic dermatitis, psoriasis or irritable bowel disease.
US07960382B2
Novel compounds and their uses are disclosed herein.
US07960379B2
Compounds comprising or a pharmaceutically acceptable salt or a prodrug thereof, are disclosed, wherein J1, J2, B, Y, A and D are as described. Methods, compositions, and medicaments related thereto are also disclosed.
US07960371B2
Large scale (bulk) compositions comprising high-purity stannsoporfin are disclosed, as well as methods of synthesizing such compositions.
US07960366B2
Methods and compositions for treating for the synergistic treatment of fungal associated disorders are discussed.
US07960352B2
The present invention relates to an Androsace umbellata Merr. extract having anticancer activity and a triterpene saponin compound isolated therefrom, more particularly to an Androsace umbellata (Lour.) Merr. extract, triterpene saponin compounds isolated therefrom, saxifragifolin B and saxifragifolin D, which inhibit the growth of cancer cells and induce apoptosis of cancer cells, and thus are useful for preparing a composition for preventing and treating cancers and a method of isolating a triterpene saponin compound from an Androsace umbellata Merr. extract.
US07960348B2
The present invention provides stable metastin derivatives having excellent biological activities (a cancer metastasis suppressing activity, a cancer growth suppressing activity, a gonadotropic hormone secretion stimulating activity, sex hormone secretion stimulating activity, etc.). By substituting the constituent amino acids of metastin with specific amino acids in the metastin derivative of the present invention, blood stability, solubility, etc. are more improved, gelation tendency is reduced, pharmacokinetics are also improved, and an excellent cancer metastasis suppressing activity or a cancer growth suppressing activity is exhibited. Furthermore, the metastin derivative of the present invention has the effects of suppressing gonadotropic hormone secretion, suppressing sex hormone secretion, etc.
US07960346B2
The present invention provides a means of selectively killing epithelial cell carcinomas by administering a CXCR4-specific sequence of the Gp120 protein or Nef proteins or the proteins themselves (the modulators) such as that found in strains HIV-1, HIV-2, SIV, or FIV CXCR4-specific Gp 120 sequences or Nef proteins or sequences may be delivered to the mucosa or systemically. The mucosal means of application include oral, intranasal, ocular, intravaginal, rectal, and/or intraurethral administration in liquid or particulate form.
US07960343B2
In certain aspects, the present invention provides compositions and methods for decreasing FSH levels in a patient. The patient may, for example, be diagnosed with an FSH-related disorder or desire to delay or inhibit germ cell maturation.
US07960341B2
The present invention relates to methods of treating polycystic ovary syndrome (PCOS) comprising administering glucagon-like peptide-1 (GLP-1), exendin, and analogs and agonists thereof, to subjects suffering therefrom.
US07960322B2
This invention encompasses a lubricating oil composition contaminated with at least about 0.3 wt % of a biodiesel fuel or a decomposition product thereof, based on the total weight of the lubricating oil composition, comprising: a. a major amount of base oil of lubricating viscosity; and b. a diarylamine compound, wherein, the amount of the diarylamine compound is at least about 0.1 wt. %, based on the total weight of the lubricating oil composition. Methods of using the lubricating oil compositions are also described.
US07960315B2
Methods are provided that include a method comprising providing a acidic treatment fluid that comprises a base fluid, an acid composition, and a gelling agent that comprises clarified diutan; and introducing the acidic treatment fluid into at least a portion of a subterranean formation. In some embodiments, the acidic treatment fluid may be allowed to interact with a component of the subterranean formation so that the component is at least partially dissolved. In some embodiments, the acidic treatment fluid may be introduced into a pipeline. Additional methods are also provided.
US07960314B2
A method comprising contacting a zwitterionic surfactant, co-surfactant, and water to form a microemulsifier, and contacting the microemulsifier with an oleaginous fluid under low shear conditions to form a microemulsion. A method comprising introducing a first wellbore servicing fluid comprising at least one oleaginous fluid into a wellbore, wherein the first wellbore servicing fluid forms oil-wet solids and/or oil-wet surfaces in the wellbore, and contacting the oil-wet solids and/or oil-wet surfaces in the wellbore with a second wellbore servicing fluid comprising a zwitterionic surfactant, a co-surfactant, and a brine to form a microemulsion.
US07960313B2
Combinatorial processing including stirring is described, including defining multiple regions of a substrate, processing the multiple regions of the substrate in a combinatorial manner, introducing a fluid into a first aperture at a first end of a body to dispense the fluid out of a second aperture at a second end of the body and into one of the multiple regions, and agitating the fluid using an impeller at a second end of the body to facilitate interaction of the fluid with a surface of the substrate.
US07960308B2
The invention provides a process which enables, in preparation of acrolein by catalytic gas-phase oxidation of propylene in the presence of molecular oxygen or a molecular oxygen-containing gas or in preparation of acrylic acid by catalytic gas-phase oxidation of acrolein in the presence of molecular oxygen or a molecular oxygen-containing gas, using single kind of atalyst, to suppress occurrence of localized extraordinarily high temperature spots (hot spots) in the catalyst layer and can stably maintain high acrolein or acrylic acid yield for a long time. The process is characterized by use of an oxide catalyst containing molybdenum as an essential component and having relative standard deviation of its particle size in a range of 0.02 to 0.20.
US07960307B2
A sulfur reduction catalyst useful to reduce the levels of sulfur in a cracked gasoline product comprises a metal vanadate compound. The metal vanadate compound can be supported on a molecular sieve such as a zeolite in which the metal vanadate compound is primarily located on the exterior surface of the pore structure of the zeolite and on the surface of any matrix material used to bind or support the zeolite.
US07960301B2
A glass composition which is reduced in the amount of residual bubbles and is produced using smaller amounts of an environmentally unfriendly component such as arsenic oxide and antimony oxide. This glass composition comprises, in terms of mass %: 40-70% SiO2; 5-20% B2O3; 10-25% Al2O3; 0-10% MgO; 0-20% CaO; 0-20% SrO; 0-10% BaO; 0.001-0.5% Li2O; 0.01-0.5% Na2O; 0.002-0.5% K2O; and 0-1.0%, excluding 0%, Cl.
US07960299B2
A reinforced fabric that includes a first fiber group and a thread. The first fiber group includes a plurality of fiber sets positioned substantially parallel to one another. Each of the fiber sets includes a plurality of fibers. The thread is formed of at least one strand of material. The thread has an outer surface that is formed of a material having a melting point that is less than the melting point of the fibers in the fiber sets. The thread is stitched about the fiber sets to at least partially maintain a position of the fiber sets relative to one another. The thread forms a plurality of heat created permanent closed loop structures in the reinforced fabric. At least one of the loop structures encircles at least one fiber set. At least one of the fibers in the fibers sets is not strongly bonded to the thread that encircles the fiber set.
US07960296B2
A spin addition method for catalyst elements is simple and very important technique, because the minimum amount of a catalyst element necessary for crystallization can be easily added by controlling the catalyst element concentration within a catalyst element solution, but there is a problem in that uniformity in the amount of added catalyst element within a substrate is poor. The non-uniformity in the amount of added catalyst element within the substrate is thought to influence fluctuation in crystallinity of a crystalline semiconductor film that has undergone thermal crystallization, and exert a bad influence on the electrical characteristics of TFTs finally structured by the crystalline semiconductor film. The present invention solves this problem with the aforementioned conventional technique. If the spin rotational acceleration speed is set low during a period moving from a dripping of the catalyst element solution process to a high velocity spin drying process in a catalyst element spin addition step, then it becomes clear that the non-uniformity of the amount of added catalyst element within the substrate is improved. The above stated problems are therefore solved by applying a spin addition process with a low spin rotational acceleration to a method of manufacturing a crystalline semiconductor film.
US07960291B2
The present invention provides porous organosilicate layers, and vapor deposition systems and methods for preparing such layers on substrates. The porous organosilicate layers are useful, for example, as masks.
US07960286B2
A method of manufacturing a semiconductor structure is provided. The method includes forming a hard mask pattern on a semiconductor substrate, wherein the hard mask pattern covers active regions; forming a trench in the semiconductor substrate within an opening defined by the hard mask pattern; filling the trench with a dielectric material, resulting in a trench isolation feature; performing an ion implantation to the trench isolation feature using the hard mask pattern to protect active regions of the semiconductor substrate; and removing the hard mask pattern after the performing of the ion implantation.
US07960280B2
An improved method of forming a fully silicided (FUSI) gate in both NMOS and PMOS transistors of the same MOS device is disclosed. In one example, the method comprises forming a first silicide in at least a top portion of a gate electrode of the PMOS devices and not over the NMOS devices. The method further comprises concurrently forming a second silicide in at least a top portion of a gate electrode of both the NMOS and PMOS devices, and forming a FUSI gate silicide of the gate electrodes. In one embodiment, the thickness of the second silicide is greater than the first silicide by an amount which compensates for a difference in the rates of silicide formation between the NMOS and PMOS devices.
US07960278B2
The present invention is a method of film deposition that comprises a film-depositing step of supplying a high-melting-point organometallic material gas and a nitrogen-containing gas to a processing vessel that can be evacuated, so as to deposit a thin film of a metallic compound of a high-melting-point metal on a surface of an object to be processed placed in the processing vessel. A partial pressure of the nitrogen-containing gas during the film-depositing step is 17% or lower, in order to increase carbon density contained in the thin film.
US07960274B2
A reliable and mechanical strong interconnect structure is provided that does not include gouging features in the bottom of the an opening, particularly at a via bottom. Instead, the interconnect structures of the present invention utilize a Co-containing buffer layer that is selectively deposited on exposed surfaces of the conductive features that are located in a lower interconnect level. The selective deposition is performed through at least one opening that is present in a dielectric material of an upper interconnect level. The selective deposition is performed by electroplating or electroless plating. The Co-containing buffer layer comprises Co and at least one of P and B. W may optionally be also present in the Co-containing buffer layer.
US07960263B2
The present invention provides an improved amorphization/templated recrystallization (ATR) method for fabricating low-defect-density hybrid orientation substrates. ATR methods for hybrid orientation substrate fabrication generally start with a Si layer having a first orientation bonded to a second Si layer or substrate having a second orientation. Selected regions of the first Si layer are amorphized and then recrystallized into the orientation of the second Si layer by using the second Si layer as a template. The process flow of the present invention solves two major difficulties not disclosed by prior art ATR methods: the creation of “corner defects” at the edges of amorphized Si regions bounded by trenches, and undesired orientation changes during a high temperature post-recrystallization defect-removal annealing of non-ATR'd regions not bounded by trenches. In particular, this invention provides a process flow comprising the steps of (i) amorphization and low-temperature recrystallization performed in substrate regions free of trenches, (ii) formation of trench isolation regions that subsume the defective regions at the edge of the ATR'd regions, and (iii) a high-temperature defect-removal anneal performed with the trench isolation regions in place.
US07960259B2
A semiconductor structure consistent with certain implementations has a crystalline substrate oriented with a {111} plane surface that is within 10 degrees of surface normal. An epitaxially grown electrically insulating interlayer overlays the crystalline substrate and establishes a coincident lattice that mates with the surface symmetry of the {111} plane surface. An atomically stable two dimensional crystalline film resides on the epitaxial insulating layer with a coincident lattice match to the insulating interlayer. Methods of fabrication are disclosed. This abstract is not to be considered limiting, since other embodiments may deviate from the features described in this abstract.
US07960254B2
To provide a manufacturing method for an epitaxial wafer that alleviates distortions on a back surface thereof due to sticking between a wafer and a susceptor, thereby preventing decrease in flatness thereof due to a lift pin. A manufacturing method for an epitaxial wafer according to the present invention includes: an oxide film forming step in which an oxide film is formed on a back surface thereof; an etching step in which a hydrophobic portion exposing a back surface of the semiconductor wafer is provided by partially removing the oxide film; a wafer placing step in which the semiconductor wafer is placed; and an epitaxial growth step in which an epitaxial layer is grown on a main surface of the semiconductor wafer; and the diameter of the lift pin installation circle provided on a circle on a bottom face of a susceptor is smaller than that of the hydrophobic portion.
US07960234B2
One embodiment of the present invention relates to a method of fabricating a multi-gate transistor. During the method a second gate electrode material is selectively removed from a semiconductor structure from which the multi-gate transistor is formed, thereby exposing at least one surface of a first gate electrode material. The exposed surface of the first gate electrode material is deglazed. Subsequently, the first gate electrode material is removed. Other methods and devices are also disclosed.
US07960232B2
By forming MOSFETs on a substrate having pre-existing ridges of semiconductor material (i.e., a “corrugated substrate”), the resolution limitations associated with conventional semiconductor manufacturing processes can be overcome, and high-performance, low-power transistors can be reliably and repeatably produced. Forming a corrugated substrate prior to actual device formation allows the ridges on the corrugated substrate to be created using high precision techniques that are not ordinarily suitable for device production. MOSFETs that subsequently incorporate the high-precision ridges into their channel regions will typically exhibit much more precise and less variable performance than similar MOSFETs formed using optical lithography-based techniques that cannot provide the same degree of patterning accuracy. Additional performance enhancement techniques such as pulse-shaped doping and “wrapped” gates can be used in conjunction with the segmented channel regions to further enhance device performance.
US07960231B2
A method of forming a semiconductor memory device includes forming a tunnel insulating layer on a semiconductor substrate, and forming a silicon layer, including metal material, on the tunnel insulating layer. Accordingly, an increase in the strain energy of the conductive layer may be prohibited and, therefore, the growth of grains constituting the conductive layer may be prevented. Furthermore, a threshold voltage distribution characteristic and electrical properties of a semiconductor memory device may be improved.
US07960228B2
The present invention provides a method for manufacturing a semiconductor device, including the steps of: forming a first ferroelectric film on a first conductive film by a film-forming method including at least a step of forming a film by a sol-gel method; forming a second ferroelectric film on the first ferroelectric film by a sputtering method; forming a second conductive film on the second ferroelectric film; and forming a capacitor provided with a lower electrode, a capacitor dielectric film and an upper electrode by patterning the first conductive film, the first and second ferroelectric films and the second conductive film.
US07960227B2
After a first via hole leading to a ferroelectric capacitor structure are formed in an interlayer insulating film by dry etching, a second via hole to expose part of the ferroelectric capacitor structure is formed in a hydrogen diffusion preventing film so as to be aligned with the first via hole by wet etching, and a via hole constructed by the first via hole and the second via hole communicating with each other is formed.
US07960224B2
A method for operating a memory device includes applying a sequence of bias arrangements across a selected metal-oxide memory element to change among resistance states. The sequence of bias arrangements includes a first set of one or more pulses to change the resistance state of the selected metal-oxide memory element from the first resistance state to a third resistance state, and a second set of one or more pulses to change the resistance state of the selected metal-oxide memory element from the third resistance state to the second resistance state.
US07960223B2
The present invention provides a semiconducting device including a substrate including a semiconducting surface having an n-type device in a first device region and a p-type device in a second device region, the n-type device including a first gate structure present overlying a portion of the semiconducting surface in the first device region including a first work function metal semiconductor alloy in the semiconducting surface adjacent to the portion of the semiconducting surface underlying the gate structure, and a first type strain inducing layer present overlying the first device region; and a p-type device including a second gate structure present overlying a portion of the semiconducting surface in the second device region including a second work function metal semiconductor alloy in the semiconducting surface adjacent to the portion of the semiconducting surface underlying the gate structure, and a second type strain inducing layer present overlying the second device region.
US07960215B2
An electronic device includes: a base; a conductor pattern formed on the base; and a circuit chip electrically connected to the conductor pattern. The electronic device further includes a reinforcing member which is disposed on the base to surround the circuit chip, whose outer shape is like a ring, and which includes layers stacked in the thickness direction of the base. The lowermost layer of the layers is closest to the base and softer than the layer that is at least one of the remaining layers. The electronic device further includes a sealing member which fills an inside of the reinforcing member while covering the top of the circuit chip, thereby sealing the circuit chip on the base.
US07960214B2
A fabricating process of chip package structure is provided. First, a first substrate having a plurality of first bonding pads and a second substrate having a plurality of second bonding pads are provide, wherein a plurality of bumps are formed on the first bonding pads of the first substrate. A first two-stage adhesive layer is formed on the first substrate or on the second substrate and is B-stagized to form a first B-staged adhesive layer. A second two-stage adhesive layer is formed on the first B-staged adhesive layer and is B-stagized to form a second B-staged adhesive layer. Then, the first substrate and the second substrate are bonded via the first B-staged adhesive layer and the second B-staged adhesive layer such that each of the first bonding pads is respectively electrically connected to one of the second bonding pads via one of the bumps.
US07960213B2
An electronic package structure and method use a conductive strip to bond die-to-die, die-to-lead, chip carrier-to-lead, or lead-to-lead. A conductive strip may carry greater current than a bonding wire, and thus may replace several bonding wires. The bonding of the conductive strip may be carried out by an SMT process, and thus requires lower cost than wire bonding processes. A conductive strip may be bonded to more than two dice or leads to save more bonding wires. A conductive strip is stronger than a bonding wire, and thus lowers the possibility of being broken.
US07960208B2
Systems and methods for forming an encapsulated device include a hermetic seal which seals an insulating environment between two substrates, one of which supports the device. The hermetic seal is formed by an alloy of two metal layers, one deposited on a first substrate and the other deposited on the second substrate, along with a raised feature formed on the first or the second substrate. At least one of the metal layers may be deposited conformally over the raised feature. The raised feature penetrates the molten material of the first or the second metal layers during formation of the alloy, and produces a spectrum of stoichiometries for the formation of the desired alloy, as a function of the distance from the raised feature. At some distance from the raised feature, the proper ratio of the first metal to the second metal exists to form an alloy of the preferred stoichiometry.
US07960205B2
The present invention is a process of making a germanium-antimony-tellurium alloy film using a process selected from the group consisting of atomic layer deposition and chemical vapor deposition, wherein a silyltellurium precursor is used as a source of tellurium for the alloy film and is reacted with an alcohol during the deposition process.
US07960202B2
Disclosed is a photodiode array comprising a semiconductor substrate; a plurality of photodiodes formed on the semiconductor substrate; and crystal fused regions losing crystallinity by fusing a semiconductor material of the photodiodes between the plurality of photodiodes.
US07960195B2
A method of manufacturing a laser diode array capable of inhibiting electric cross talk is provided. The method of manufacturing a laser diode array includes a processing step of forming a peel layer containing an oxidizable material and a vertical resonator structure over a first substrate sequentially from the first substrate side by crystal growth, and then selectively etching the peel layer and the vertical resonator structure to the first substrate, thereby processing into a columnar shape, a peeling step of oxidizing the peel layer from a side face, and then peeling the vertical resonator structure of columnar shape from the first substrate, and a rearrangement step of jointing a plurality of vertical resonator structures of columnar shape obtained by the peeling step to a surface of a metal layer of a second substrate formed with the metal layer on the surface.