公开(公告)号：US20180122707A1

公开(公告)日：2018-05-03

申请号：US15339949

申请日：2016-11-01

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： Yi-Liang Ye ,  Kuang-Hsiu Chen ,  Chun-Wei Yu ,  Chueh-Yang Liu ,  Wen-Jiun Shen ,  Yu-Ren Wang

IPC: H01L21/8238 ,  H01L29/161 ,  H01L29/49 ,  H01L29/66 ,  H01L21/311 ,  H01L27/092

CPC classification number: H01L21/823821 ,  H01L21/3081 ,  H01L21/31116 ,  H01L21/823814 ,  H01L21/823864 ,  H01L27/0924 ,  H01L29/6653 ,  H01L29/7848 ,  H01L29/785

Abstract: The present invention provides a method for forming a semiconductor device, comprising the following steps: firstly, a substrate is provided, having a NMOS region and a PMOS region defined thereon, next, a gate structure is formed on the substrate within the NMOS region, and a disposal spacer is formed on two sides of the gate structure, afterwards, a mask layer is formed on the PMOS region to expose the NMOS region, next, a recess is formed on two sides of the gate structure spaced from the gate structure by the disposal spacer within the NMOS region, the disposal spacer is then removed after the recess is formed, and an epitaxial layer is formed into the recess.

公开(公告)号：US20160020323A1

公开(公告)日：2016-01-21

申请号：US14463676

申请日：2014-08-20

Applicant: United Microelectronics Corp.

Inventor： Yen-Liang Wu ,  Chung-Fu Chang ,  Yu-Hsiang Hung ,  Wen-Jiun Shen ,  Ssu-I Fu ,  Man-Ling Lu ,  Chia-Jong Liu ,  Yi-Wei Chen

IPC: H01L29/78 ,  H01L29/66

CPC classification number: H01L29/7848 ,  H01L29/0673 ,  H01L29/1054 ,  H01L29/161 ,  H01L29/66545 ,  H01L29/66795 ,  H01L29/775 ,  H01L29/785 ,  H01L29/7854

Abstract: A semiconductor device includes a fin structure, an insulating structure, a protruding structure, an epitaxial structure, and a gate structure. The fin structure and the insulating structure are disposed on the substrate. The protruding structure is in direct contact with the substrate and partially protrudes from the insulating structure, and the protruding structure is the fin structure. The epitaxial structure is disposed on a top surface of the fin structure and completely covers the top surface of the fin structure. In addition, the epitaxial structure has a curved top surface. The gate structure covers the fin structure and the epitaxial structure.

Abstract translation: 半导体器件包括鳍结构，绝缘结构，突出结构，外延结构和栅极结构。 翅片结构和绝缘结构设置在基板上。 突出结构与基板直接接触，并从绝缘结构部分突出，突出结构为翅片结构。 外延结构设置在翅片结构的顶表面上并完全覆盖翅片结构的顶表面。 此外，外延结构具有弯曲的顶表面。 栅极结构覆盖鳍结构和外延结构。

公开(公告)号：US20160020110A1

公开(公告)日：2016-01-21

申请号：US14462114

申请日：2014-08-18

Applicant: United Microelectronics Corp.

Inventor： Man-Ling Lu ,  Yu-Hsiang Hung ,  Chung-Fu Chang ,  Yen-Liang Wu ,  Wen-Jiun Shen ,  Chia-Jong Liu ,  Ssu-I Fu ,  Yi-Wei Chen

IPC: H01L21/308 ,  H01L29/78

CPC classification number: H01L29/7848 ,  H01L21/3086 ,  H01L29/66545 ,  H01L29/6656 ,  H01L29/66636 ,  H01L29/78

Abstract: A method of forming a semiconductor device is provided. At least one stacked structure is provided on a substrate. A first spacer material layer, a second spacer material layer, and a third spacer material layer are sequentially formed on the substrate and cover the stacked structure. The first, second, and third spacer material layers are etched to form a tri-layer spacer structure on the sidewall of the stacked structure. The tri-layer spacer structure includes, from one side of the stacked structure, a first spacer, a second spacer, and a third spacer, and a dielectric constant of the second spacer is less than each of a dielectric constant of the first spacer and a dielectric constant of the third spacer.

Abstract translation: 提供一种形成半导体器件的方法。 在基板上设置至少一个层叠结构。 第一间隔物层，第二间隔物层和第三间隔物层依次形成在基板上并覆盖层叠结构。 第一，第二和第三间隔物材料层被蚀刻以在堆叠结构的侧壁上形成三层间隔结构。 三层间隔结构包括从层叠结构的一侧形成第一间隔物，第二间隔物和第三间隔物，第二间隔物的介电常数小于第一间隔物的介电常数和 第三间隔物的介电常数。

公开(公告)号：US10930517B2

公开(公告)日：2021-02-23

申请号：US16532477

申请日：2019-08-06

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： Wen-Jiun Shen ,  Ssu-I Fu ,  Yen-Liang Wu ,  Chia-Jong Liu ,  Yu-Hsiang Hung ,  Chung-Fu Chang ,  Man-Ling Lu ,  Yi-Wei Chen

IPC: H01L21/77 ,  H01L21/308 ,  H01L27/088 ,  H01L21/8234 ,  H01L21/306 ,  H01L29/66 ,  H01L21/02

Abstract: A fin-shaped structure includes a substrate having a first fin-shaped structure located in a first area and a second fin-shaped structure located in a second area, wherein the second fin-shaped structure includes a ladder-shaped cross-sectional profile part. The present invention also provides two methods of forming this fin-shaped structure. In one case, a substrate having a first fin-shaped structure and a second fin-shaped structure is provided. A treatment process is performed to modify an external surface of the top of the second fin-shaped structure, thereby forming a modified part. A removing process is performed to remove the modified part through a high removing selectivity to the first fin-shaped structure and the second fin-shaped structure, and the modified part, thereby the second fin-shaped structure having a ladder-shaped cross-sectional profile part is formed.

公开(公告)号：US10418251B2

公开(公告)日：2019-09-17

申请号：US15688885

申请日：2017-08-29

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： Wen-Jiun Shen ,  Ssu-I Fu ,  Yen-Liang Wu ,  Chia-Jong Liu ,  Yu-Hsiang Hung ,  Chung-Fu Chang ,  Man-Ling Lu ,  Yi-Wei Chen

IPC: H01L21/8232 ,  H01L21/308 ,  H01L27/088 ,  H01L21/8234 ,  H01L21/306 ,  H01L29/66 ,  H01L21/02

Abstract: A fin-shaped structure includes a substrate having a first fin-shaped structure located in a first area and a second fin-shaped structure located in a second area, wherein the second fin-shaped structure includes a ladder-shaped cross-sectional profile part. The present invention also provides two methods of forming this fin-shaped structure. In one case, a substrate having a first fin-shaped structure and a second fin-shaped structure is provided. A treatment process is performed to modify an external surface of the top of the second fin-shaped structure, thereby forming a modified part. A removing process is performed to remove the modified part through a high removing selectivity to the first fin-shaped structure and the second fin-shaped structure, and the modified part, thereby the second fin-shaped structure having a ladder-shaped cross-sectional profile part is formed.

公开(公告)号：US20170098708A1

公开(公告)日：2017-04-06

申请号：US14873214

申请日：2015-10-02

Applicant: United Microelectronics Corp.

Inventor： Wen-Jiun Shen ,  Chia-Jong Liu ,  Chung-Fu Chang ,  Yen-Liang Wu ,  Man-Ling Lu ,  I-Fan Chang ,  Yi-Wei Chen

IPC: H01L29/78 ,  H01L27/088 ,  H01L29/08 ,  H01L29/06 ,  H01L29/165

CPC classification number: H01L29/7848 ,  H01L21/823425 ,  H01L21/823814 ,  H01L27/088 ,  H01L29/0688 ,  H01L29/0847 ,  H01L29/161 ,  H01L29/165 ,  H01L29/6656 ,  H01L29/66636 ,  H01L29/7834

Abstract: A semiconductor device includes a substrate, a gate structure, a sidewall spacer, and an epitaxial layer. The gate structure is disposed on the substrate, and the substrate has at least one recess disposed adjacent to the gate structure. The sidewall spacer is disposed on at least two sides of the gate structure. The sidewall spacer includes a first spacer layer and a second spacer layer, and the first spacer layer is disposed between the gate structure and the second spacer layer. The epitaxial layer is disposed in the recess, and the recess is a circular shaped recess. A distance between an upmost part of the recess and the gate structure is less than a width of the sidewall spacer.

公开(公告)号：US20150357436A1

公开(公告)日：2015-12-10

申请号：US14324252

申请日：2014-07-07

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： Wen-Jiun Shen ,  Chia-Jong Liu ,  Yi-Wei Chen ,  Ssu-I Fu ,  Chung-Fu Chang ,  Yu-Hsiang Hung ,  Yen-Liang Wu ,  Man-Ling Lu

IPC: H01L29/66 ,  H01L21/3065 ,  H01L29/78

CPC classification number: H01L29/66636 ,  H01L21/3065 ,  H01L29/165 ,  H01L29/66795 ,  H01L29/7848

Abstract: A method for fabricating semiconductor device is disclosed. The method includes the steps of: providing a substrate; forming a gate structure on the substrate; performing a first dry etching process to form a recess in the substrate adjacent to the gate structure; and performing a second dry etching process to expand the recess.

Abstract translation: 公开了半导体器件的制造方法。 该方法包括以下步骤：提供衬底; 在基板上形成栅极结构; 执行第一干蚀刻工艺以在所述衬底中邻近所述栅极结构形成凹陷; 以及执行第二干蚀刻工艺以使凹部膨胀。

公开(公告)号：US20180331223A1

公开(公告)日：2018-11-15

申请号：US16028187

申请日：2018-07-05

Applicant: United Microelectronics Corp.

Inventor： Man-Ling Lu ,  Yu-Hsiang Hung ,  Chung-Fu Chang ,  Yen-Liang Wu ,  Wen-Jiun Shen ,  Chia-Jong Liu ,  Ssu-I Fu ,  Yi-Wei Chen

IPC: H01L29/78 ,  H01L29/66 ,  H01L21/308

CPC classification number: H01L29/7848 ,  H01L21/3086 ,  H01L29/66545 ,  H01L29/6656 ,  H01L29/66636 ,  H01L29/78

Abstract: A method of forming a semiconductor device is provided. At least one stacked structure is provided on a substrate. A first spacer material layer, a second spacer material layer, and a third spacer material layer are sequentially formed on the substrate and cover the stacked structure. The first, second, and third spacer material layers are etched to form a tri-layer spacer structure on the sidewall of the stacked structure. The tri-layer spacer structure includes, from one side of the stacked structure, a first spacer, a second spacer, and a third spacer, and a dielectric constant of the second spacer is less than each of a dielectric constant of the first spacer and a dielectric constant of the third spacer.

公开(公告)号：US09899523B2

公开(公告)日：2018-02-20

申请号：US14594159

申请日：2015-01-11

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： Wen-Jiun Shen ,  Chia-Jong Liu ,  Chung-Fu Chang ,  Yen-Liang Wu ,  Man-Ling Lu ,  Yi-Wei Chen ,  Jhen-Cyuan Li

IPC: H01L29/78 ,  H01L29/66

CPC classification number: H01L29/785 ,  H01L29/66795 ,  H01L29/7843 ,  H01L29/7847

Abstract: The present invention provides a semiconductor structure, comprising a substrate, a gate structure, a source/drain region and at least a dislocation. The gate structure is disposed on the substrate. The source/drain region is disposed in the substrate at two sides of the gate structure. The dislocation is located in the source/drain region, and is asymmetrical relating to a middle axis of the source/drain region.

公开(公告)号：US20170358455A1

公开(公告)日：2017-12-14

申请号：US15688885

申请日：2017-08-29

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： Wen-Jiun Shen ,  Ssu-I Fu ,  Yen-Liang Wu ,  Chia-Jong Liu ,  Yu-Hsiang Hung ,  Chung-Fu Chang ,  Man-Ling Lu ,  Yi-Wei Chen

IPC: H01L21/308 ,  H01L27/088 ,  H01L21/306 ,  H01L21/8234 ,  H01L21/02

CPC classification number: H01L21/308 ,  H01L21/02238 ,  H01L21/30604 ,  H01L21/823431 ,  H01L27/0886 ,  H01L29/66818

Abstract: A fin-shaped structure includes a substrate having a first fin-shaped structure located in a first area and a second fin-shaped structure located in a second area, wherein the second fin-shaped structure includes a ladder-shaped cross-sectional profile part. The present invention also provides two methods of forming this fin-shaped structure. In one case, a substrate having a first fin-shaped structure and a second fin-shaped structure is provided. A treatment process is performed to modify an external surface of the top of the second fin-shaped structure, thereby forming a modified part. A removing process is performed to remove the modified part through a high removing selectivity to the first fin-shaped structure and the second fin-shaped structure, and the modified part, thereby the second fin-shaped structure having a ladder-shaped cross-sectional profile part is formed.