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公开(公告)号:US20240145412A1
公开(公告)日:2024-05-02
申请号:US17994382
申请日:2022-11-27
Applicant: UNITED MICROELECTRONICS CORP.
Inventor: Shih-Che Huang , Chao-Ting Chen , Jui-Fa Lu , Chi-Heng Lin
IPC: H01L23/60 , H01L23/522
CPC classification number: H01L23/60 , H01L23/5221 , H01L23/5226
Abstract: A semiconductor device includes a logic circuit region having at least one core device and at least one input/output (I/O) device. The at least one core device has a first accumulative antenna ratio, and the at least one I/O device has a second accumulative antenna ratio. The first accumulative antenna ratio is greater than the second accumulative antenna ratio.
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公开(公告)号:US20130337622A1
公开(公告)日:2013-12-19
申请号:US13971763
申请日:2013-08-20
Applicant: United Microelectronics Corp.
Inventor: Chan-Lon Yang , Ching-Nan Hwang , Chi-Heng Lin , Chun-Yao Yang , Ger-Pin Lin , Ching-I Li
IPC: H01L49/02
CPC classification number: H01L28/24 , H01L21/26593 , H01L21/32155 , H01L21/76224 , H01L27/0629 , H01L28/20
Abstract: A semiconductor process is provided, including following steps. A polysilicon layer is formed on a substrate. An asymmetric dual-side heating treatment is performed to the polysilicon layer, wherein a power for a front-side heating is different from a power for a backside heating.
Abstract translation: 提供半导体工艺,包括以下步骤。 在基板上形成多晶硅层。 对多晶硅层进行不对称双面加热处理,其中用于正面加热的功率不同于用于背面加热的功率。
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公开(公告)号:US20150104914A1
公开(公告)日:2015-04-16
申请号:US14551922
申请日:2014-11-24
Applicant: United Microelectronics Corp.
Inventor: Chan-Lon Yang , Ching-Nan Hwang , Chi-Heng Lin , Chun-Yao Yang , Ger-Pin Lin , Ching-I Li
IPC: H01L21/265 , H01L21/02 , H01L21/3215 , H01L49/02 , H01L27/06
CPC classification number: H01L21/26593 , H01L21/02532 , H01L21/32155 , H01L21/324 , H01L21/76224 , H01L27/0629 , H01L28/20
Abstract: A semiconductor process is provided, including following steps. A polysilicon layer is formed on a substrate. The polysilicon layer is cryo-implanted with at least two of multiple species including a germanium species, a carbon species and a p- or n-type species, at a temperature ranging between −40° C. and −120° C. An asymmetric dual-side heating treatment is performed to the polysilicon layer, wherein a power for a front-side heating is different from a power for a backside heating.
Abstract translation: 提供半导体工艺,包括以下步骤。 在基板上形成多晶硅层。 多晶硅层在-40℃至-120℃的温度范围内用至少两种多种物质进行低温注入,包括锗物质,碳物质和p型或n型物质。不对称 对多晶硅层进行双面加热处理,其中用于正面加热的功率与用于背面加热的功率不同。
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