公开(公告)号：US12068234B2

公开(公告)日：2024-08-20

申请号：US18200580

申请日：2023-05-23

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： Chun-Hung Chen ,  Ming-Tse Lin

IPC: H01L27/08 ,  H01L21/48 ,  H01L21/768 ,  H01L23/00 ,  H01L23/48 ,  H01L23/498 ,  H01L23/64 ,  H01L27/01

CPC classification number: H01L23/49838 ,  H01L21/486 ,  H01L21/76898 ,  H01L23/481 ,  H01L23/49827 ,  H01L23/642 ,  H01L24/13 ,  H01L24/16 ,  H01L27/01 ,  H01L2224/13023 ,  H01L2224/13024 ,  H01L2224/16113 ,  H01L2224/16147

Abstract: A semiconductor structure includes an interposer substrate, an electronic device formed in a device region of the interposer substrate, a guard ring formed in the interposer substrate and surrounding the device region, a first redistribution layer on an upper surface of the interposer substrate and covering the device region and the guard ring, and a chip disposed on the first redistribution layer and overlapping the device region.

公开(公告)号：US20230290719A1

公开(公告)日：2023-09-14

申请号：US18200580

申请日：2023-05-23

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： Chun-Hung Chen ,  Ming-Tse Lin

IPC: H01L23/498 ,  H01L23/00 ,  H01L23/64 ,  H01L23/48 ,  H01L21/48 ,  H01L27/01 ,  H01L21/768

CPC classification number: H01L23/49838 ,  H01L23/49827 ,  H01L24/13 ,  H01L24/16 ,  H01L23/642 ,  H01L23/481 ,  H01L21/486 ,  H01L27/01 ,  H01L21/76898 ,  H01L2224/16147 ,  H01L2224/13023 ,  H01L2224/13024 ,  H01L2224/16113

Abstract: A semiconductor structure includes an interposer substrate, an electronic device formed in a device region of the interposer substrate, a guard ring formed in the interposer substrate and surrounding the device region, a first redistribution layer on an upper surface of the interposer substrate and covering the device region and the guard ring, and a chip disposed on the first redistribution layer and overlapping the device region.

公开(公告)号：US11616035B2

公开(公告)日：2023-03-28

申请号：US17397765

申请日：2021-08-09

Applicant: United Microelectronics Corp.

Inventor： Teng-Chuan Hu ,  Chun-Hung Chen ,  Chu-Fu Lin

IPC: H01L25/065 ,  H01L23/00 ,  H01L25/18

Abstract: A semiconductor structure, including a substrate and multiple chips, is provided. The chips are stacked on the substrate. Each of the chips has a first side and a second side opposite to each other. Each of the chips includes a transistor adjacent to the first side and a storage node adjacent to the second side. Two adjacent chips are bonded to each other. The transistor of one of the two adjacent chips is electrically connected to the storage node of the other one of the two adjacent chips to form a memory cell.

公开(公告)号：US20230025541A1

公开(公告)日：2023-01-26

申请号：US17397765

申请日：2021-08-09

Applicant: United Microelectronics Corp.

Inventor： Teng-Chuan Hu ,  Chun-Hung Chen ,  Chu-Fu Lin

IPC: H01L23/00 ,  H01L25/065 ,  H01L25/18

Abstract: A semiconductor structure, including a substrate and multiple chips, is provided. The chips are stacked on the substrate. Each of the chips has a first side and a second side opposite to each other. Each of the chips includes a transistor adjacent to the first side and a storage node adjacent to the second side. Two adjacent chips are bonded to each other. The transistor of one of the two adjacent chips is electrically connected to the storage node of the other one of the two adjacent chips to form a memory cell.

公开(公告)号：US10340231B2

公开(公告)日：2019-07-02

申请号：US15486521

申请日：2017-04-13

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： Chun-Hung Chen ,  Chu-Fu Lin ,  Ming-Tse Lin

IPC: H01L23/64 ,  H01L23/31 ,  H01L23/00 ,  H01L21/56

Abstract: A semiconductor package structure and a method for forming the same are disclosed. The semiconductor package structure includes a semiconductor die, a molding layer and an inductor. The semiconductor die includes an active surface, a back surface and a sidewall surface between the active surface and the back surface. The molding layer covers the back surface and the sidewall surface of the semiconductor die. The inductor is in the molding layer. The sidewall surface of the semiconductor die faces toward the inductor.

公开(公告)号：US20180269167A1

公开(公告)日：2018-09-20

申请号：US15486521

申请日：2017-04-13

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： Chun-Hung Chen ,  Chu-Fu Lin ,  Ming-Tse Lin

IPC: H01L23/64 ,  H01L23/31 ,  H01L23/00 ,  H01L21/56

CPC classification number: H01L23/645 ,  H01L21/568 ,  H01L23/3185 ,  H01L24/19 ,  H01L2224/04105 ,  H01L2224/96 ,  H01L2924/1431 ,  H01L2924/19042 ,  H01L2924/19105 ,  H01L2924/30107

Abstract: A semiconductor package structure and a method for forming the same are disclosed. The semiconductor package structure includes a semiconductor die, a molding layer and an inductor. The semiconductor die includes an active surface, a back surface and a sidewall surface between the active surface and the back surface. The molding layer covers the back surface and the sidewall surface of the semiconductor die. The inductor is in the molding layer. The sidewall surface of the semiconductor die faces toward the inductor.

公开(公告)号：US09287173B2

公开(公告)日：2016-03-15

申请号：US13900565

申请日：2013-05-23

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： Chien-Li Kuo ,  Chun-Hung Chen ,  Ming-Tse Lin ,  Yung-Chang Lin

IPC: H01L21/768 ,  H01L23/48

CPC classification number: H01L21/76898 ,  H01L21/76877 ,  H01L21/76885 ,  H01L23/481 ,  H01L2924/0002 ,  H01L2924/00

Abstract: A through silicon via includes a substrate and a conductive plug. The substrate has a hole in a side. The conductive plug is disposed in the hole, and the conductive plug having an upper part protruding from the side, wherein the upper part has a top part and a bottom part, and the top part is finer than the bottom part. Moreover, a through silicon via process formed said through silicon via is also provided, which includes the following step. A hole is formed in a substrate from a side. A first conductive material is formed to cover the hole and the side. A patterned photoresist is formed to cover the side but exposing the hole. A second conductive material is formed on the exposed first conductive material. The patterned photoresist is removed. The first conductive material on the side is removed to form a conductive plug in the hole.

Abstract translation: 透硅通孔包括基底和导电塞。 基板在一侧具有孔。 导电插头设置在孔中，导电插头具有从侧面突出的上部，其中上部具有顶部和底部，并且顶部比底部更细。 此外，还提供了通过硅通孔形成的贯穿硅通孔工艺，其包括以下步骤。 从一侧在基板上形成孔。 形成第一导电材料以覆盖孔和侧面。 形成图案化的光致抗蚀剂以覆盖侧面但暴露孔。 在暴露的第一导电材料上形成第二导电材料。 去除图案化的光致抗蚀剂。 去除侧面上的第一导电材料以在孔中形成导电塞。

公开(公告)号：US12040354B2

公开(公告)日：2024-07-16

申请号：US18119009

申请日：2023-03-08

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： Teng-Chuan Hu ,  Chu-Fu Lin ,  Chun-Hung Chen

IPC: H01L21/02 ,  H01L49/02

CPC classification number: H01L28/91

Abstract: A capacitor structure comprises a substrate having a first side, a second side opposite to the first side and an upper surface corresponding to the first side; a plurality of first trenches formed on the first side of the substrate, disposed along a first direction and a second direction parallel to the upper surface, and penetrating the substrate along a third direction, the first direction, the second direction and the third direction orthogonal to each other; a plurality of second trenches formed on the second side of the substrate and penetrating the substrate along the third direction, the first trenches and the second trenches separated from each other in the first direction; a first capacitor extending along the first side and into the first trenches; and a second capacitor extending along the second side and into the second trenches.

公开(公告)号：US20230005833A1

公开(公告)日：2023-01-05

申请号：US17943215

申请日：2022-09-13

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： Chun-Hung Chen ,  Ming-Tse Lin

IPC: H01L23/498 ,  H01L21/48 ,  H01L23/64 ,  H01L21/768 ,  H01L23/00 ,  H01L23/48 ,  H01L27/01

Abstract: A semiconductor structure includes an interposer substrate having an upper surface, a lower surface opposite to the upper surface, and a device region. A first redistribution layer is formed on the upper surface of the interposer substrate. A guard ring is formed in the interposer substrate and surrounds the device region. At least a through-silicon via (TSV) is formed in the interposer substrate. An end of the guard ring and an end of the TSV that are near the upper surface of the interposer substrate are flush with each other, and are electrically connected to the first redistribution layer.

公开(公告)号：US20220084928A1

公开(公告)日：2022-03-17

申请号：US17073392

申请日：2020-10-18

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： Chun-Hung Chen ,  Ming-Tse Lin

IPC: H01L23/498 ,  H01L23/00 ,  H01L23/64 ,  H01L23/48 ,  H01L21/768 ,  H01L21/48 ,  H01L27/01

Abstract: A semiconductor structure is disclosed. The semiconductor structure includes an interposer substrate having an upper surface and a lower surface that is opposite to the upper surface. A guard ring is formed in the interposer substrate and surrounds a device region of the interposer substrate. At least a through-silicon via is formed in the interposer substrate. An end of the guard ring and an end of the through-silicon via that are near the upper surface of the interposer substrate are flush with each other.