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公开(公告)号:US11973005B2
公开(公告)日:2024-04-30
申请号:US17392904
申请日:2021-08-03
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor: Yu-Hsun Wang , Ping-Yin Hsieh , Pu Wang , Li-Hui Cheng , Szu-Wei Lu
IPC: H01L25/00 , H01L23/367 , H01L23/433 , H01L25/065 , H01L23/498 , H01L25/18
CPC classification number: H01L23/433 , H01L23/3675 , H01L25/0652 , H01L25/0655 , H01L25/50 , H01L23/49833 , H01L25/18
Abstract: A method includes bonding a first package and a second package over a package component, adhering a first Thermal Interface Material (TIM) and a second TIM over the first package and the second package, respectively, dispensing an adhesive feature on the package component, and placing a heat sink over and contacting the adhesive feature. The heat sink includes a portion over the first TIM and the second TIM. The adhesive feature is then cured.
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公开(公告)号:US11942403B2
公开(公告)日:2024-03-26
申请号:US17980914
申请日:2022-11-04
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor: Chih-Chien Pan , Li-Hui Cheng , Chin-Fu Kao , Szu-Wei Lu
IPC: H01L23/498 , H01L21/304 , H01L21/306 , H01L21/56 , H01L21/78 , H01L23/00 , H01L23/31 , H01L25/065
CPC classification number: H01L23/49811 , H01L21/304 , H01L21/30604 , H01L21/561 , H01L21/78 , H01L23/3114 , H01L23/49827 , H01L24/09 , H01L24/81 , H01L24/97 , H01L25/0652
Abstract: In an embodiment, a package includes: an interposer having a first side; a first integrated circuit device attached to the first side of the interposer; a second integrated circuit device attached to the first side of the interposer; an underfill disposed beneath the first integrated circuit device and the second integrated circuit device; and an encapsulant disposed around the first integrated circuit device and the second integrated circuit device, a first portion of the encapsulant extending through the underfill, the first portion of the encapsulant physically disposed between the first integrated circuit device and the second integrated circuit device, the first portion of the encapsulant being planar with edges of the underfill and edges of the first and second integrated circuit devices.
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公开(公告)号:US11756802B2
公开(公告)日:2023-09-12
申请号:US17815410
申请日:2022-07-27
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor: Jing-Cheng Lin , Li-Hui Cheng , Po-Hao Tsai
IPC: H01L21/56 , H01L21/48 , H01L21/683 , H01L23/367 , H01L23/31 , H01L23/373 , H01L23/42 , H01L23/538 , H01L23/00 , H01L25/11 , H01L25/00
CPC classification number: H01L21/566 , H01L21/486 , H01L21/4853 , H01L21/4857 , H01L21/4871 , H01L21/56 , H01L21/561 , H01L21/568 , H01L21/6835 , H01L23/3114 , H01L23/3128 , H01L23/3135 , H01L23/3675 , H01L23/3736 , H01L23/42 , H01L23/5383 , H01L23/5384 , H01L23/5386 , H01L23/5389 , H01L24/19 , H01L24/20 , H01L25/117 , H01L25/50 , H01L2221/68318 , H01L2221/68359 , H01L2221/68372 , H01L2221/68381 , H01L2224/04105 , H01L2224/12105 , H01L2224/214 , H01L2224/32145 , H01L2224/32225 , H01L2224/73265 , H01L2225/0651 , H01L2225/06568 , H01L2225/1035 , H01L2225/1058 , H01L2225/1094 , H01L2924/15311 , H01L2924/1815 , H01L2924/18162
Abstract: A method includes forming a release film over a carrier, attaching a device over the release film through a die-attach film, encapsulating the device in an encapsulating material, performing a planarization on the encapsulating material to expose the device, detaching the device and the encapsulating material from the carrier, etching the die-attach film to expose a back surface of the device, and applying a thermal conductive material on the back surface of the device.
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公开(公告)号:US11705381B2
公开(公告)日:2023-07-18
申请号:US17375304
申请日:2021-07-14
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor: Chih-Hao Chen , Hung-Yu Chen , Pu Wang , Li-Hui Cheng , Szu-Wei Lu
IPC: H01L23/373 , H01L23/31 , H01L23/04 , H01L23/40 , H01L21/48
CPC classification number: H01L23/3737 , H01L21/4882 , H01L23/04 , H01L23/3128 , H01L23/4006 , H01L2023/4087
Abstract: A method of forming a semiconductor structure includes: attaching a semiconductor device to a first surface of a substrate; placing a thermal interface material (TIM) film over a first side of the semiconductor device distal from the substrate, where the TIM film is pre-formed before the placing, where after the placing, a peripheral portion of the TIM film extends laterally beyond sidewalls of the semiconductor device; and attaching a lid to the first surface of the substrate to form an enclosed space between the lid and the substrate, where after attaching the lid, the semiconductor device and the TIM film are disposed in the enclosed space, where a first side of the TIM film distal from the substrate contacts the lid.
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5.
公开(公告)号:US20230014913A1
公开(公告)日:2023-01-19
申请号:US17686856
申请日:2022-03-04
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor: Chih-Hao Chen , Po-Yuan Cheng , Pu Wang , Li-Hui Cheng
IPC: H01L23/367 , H01L23/373 , H01L23/538 , H01L23/00 , H01L21/683 , H01L21/48
Abstract: In an embodiment, a device includes: a package component including an integrated circuit die and conductive connectors connected to the integrated circuit die, the conductive connectors disposed at a front-side of the package component, the integrated circuit die exposed at a back-side of the package component; a heat dissipation layer on the back-side of the package component and on sidewalls of the package component; an adhesive layer on a back-side of the heat dissipation layer, a portion of a sidewall of the heat dissipation layer being free from the adhesive layer; and a package substrate connected to the conductive connectors.
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公开(公告)号:US20220392823A1
公开(公告)日:2022-12-08
申请号:US17375304
申请日:2021-07-14
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor: Chih-Hao Chen , Hung-Yu Chen , Pu Wang , Li-Hui Cheng , Szu-Wei Lu
IPC: H01L23/373 , H01L23/31 , H01L23/04 , H01L23/40 , H01L21/48
Abstract: A method of forming a semiconductor structure includes: attaching a semiconductor device to a first surface of a substrate; placing a thermal interface material (TIM) film over a first side of the semiconductor device distal from the substrate, where the TIM film is pre-formed before the placing, where after the placing, a peripheral portion of the TIM film extends laterally beyond sidewalls of the semiconductor device; and attaching a lid to the first surface of the substrate to form an enclosed space between the lid and the substrate, where after attaching the lid, the semiconductor device and the TIM film are disposed in the enclosed space, where a first side of the TIM film distal from the substrate contacts the lid.
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公开(公告)号:US20220359345A1
公开(公告)日:2022-11-10
申请号:US17392904
申请日:2021-08-03
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd
Inventor: Yu-Hsun Wang , Ping-Yin Hsieh , Pu Wang , Li-Hui Cheng , Szu-Wei Lu
IPC: H01L23/433 , H01L25/065 , H01L23/367 , H01L25/00
Abstract: A method includes bonding a first package and a second package over a package component, adhering a first Thermal Interface Material (TIM) and a second TIM over the first package and the second package, respectively, dispensing an adhesive feature on the package component, and placing a heat sink over and contacting the adhesive feature. The heat sink includes a portion over the first TIM and the second TIM. The adhesive feature is then cured.
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公开(公告)号:US11239136B1
公开(公告)日:2022-02-01
申请号:US16941509
申请日:2020-07-28
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor: Chih-Hao Chen , Chin-Fu Kao , Li-Hui Cheng , Szu-Wei Lu , Chih-Chien Pan
IPC: H01L23/34 , H01L23/48 , H01L23/28 , H01L21/00 , H05K7/20 , H01L23/42 , H01L27/06 , H01L23/31 , H01L23/00 , H01L21/56 , H01L23/538 , H01L25/065 , H01L23/498
Abstract: Provided are a package structure and a method of forming the same. The package structure includes a first die, a second die, an interposer, an underfill layer, a thermal interface material (TIM), and an adhesive pattern. The first die and the second die are disposed side by side on the interposer. The underfill layer is disposed between the first die and the second die. The TIM is disposed on the first die, the second die, and the underfill layer. The adhesive pattern is disposed between the underfill layer and the TIM to separate the underfill layer from the TIM.
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公开(公告)号:US11121051B2
公开(公告)日:2021-09-14
申请号:US16655135
申请日:2019-10-16
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor: Li-Hui Cheng , Chin-Fu Kao , Szu-Wei Lu , Chih-Chien Pan
Abstract: Semiconductor packages and methods of forming the same are disclosed. a semiconductor package includes a die and an underfill. The die is disposed over a surface and includes a first sidewall. The underfill encapsulates the die. The underfill includes a first underfill fillet on the first sidewall, and in a cross-sectional view, a second sidewall of the first underfill fillet has a turning point.
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公开(公告)号:US11101252B2
公开(公告)日:2021-08-24
申请号:US16548817
申请日:2019-08-22
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor: Shih-Ting Lin , Chin-Fu Kao , Jing-Cheng Lin , Li-Hui Cheng , Szu-Wei Lu
Abstract: A package-on-package structure including a first and second package is provided. The first package includes a semiconductor die, through insulator vias, an insulating encapsulant, conductive terminals and a redistribution layer. The semiconductor die has a die height H1. The plurality of through insulator vias is surrounding the semiconductor die and has a height H2, and H2