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公开(公告)号：US20230048022A1
公开(公告)日：2023-02-16
申请号：US17402019
申请日：2021-08-13
Applicant: Texas Instruments Incorporated
Inventor： Charles Parkhurst , Gabriel Eugenio De La Cruz Hernandez , Keith Ryan Green , Dimitar Trifonov , Chao-Hsuian Tsay
Abstract: A Hall effect sensor including a Hall element disposed at a surface of a semiconductor body, including a first doped region of a first conductivity type disposed over and abutted by an isolated second doped region of a second conductivity type. First through fourth terminals of the Hall element are in electrical contact with the first doped region, and a fifth terminal in electrical contact with the second doped region. A Hall effect sensor includes a first current source coupled to the first terminal of the Hall element, and common mode feedback regulation circuitry. The common mode feedback regulation circuitry has an output coupled to the third terminal and a ground node, and having an input coupled to the second and fourth terminals of the Hall element, and an output coupled to the third terminal and a ground node, where the second doped region is coupled to the third terminal.
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公开(公告)号：US20220407480A1
公开(公告)日：2022-12-22
申请号：US17350817
申请日：2021-06-17
Applicant: Texas Instruments Incorporated
IPC: H03F3/45
Abstract: A two-stage differential amplifier with cross-coupled compensation capacitors. The differential amplifier includes first amplifier circuitry receiving a differential input voltage and presenting first and second intermediate outputs. The amplifier further includes a second amplifier stage with a first leg having an input coupled to the second intermediate output of the first amplifier circuitry, and a second leg having an input coupled to the first intermediate output of the first amplifier circuitry. A compensation capacitor is provided for each leg of the second amplifier stage, each coupled between the output of that amplifier leg and its input. A first cross-coupled capacitor is coupled between the output of the first amplifier leg to the input of the second amplifier leg, and a second cross-coupled capacitor is coupled between the output of the second amplifier leg and the input of the first amplifier leg.
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公开(公告)号：US10979006B2
公开(公告)日：2021-04-13
申请号：US16437441
申请日：2019-06-11
Applicant: Texas Instruments Incorporated
Inventor： Charles Parkhurst , Julio E. Acosta
Abstract: A chopper-stabilized current feedback amplifier includes an input buffer having a non-inverting input and an inverting input. A first group of chopper circuits modulate current at the non-inverting and inverting inputs. The current feedback amplifier further includes a plurality of current mirrors coupled to the input buffer. A second group of chopper circuits modulate current in the current mirrors. The current feedback amplifier also includes phase detector circuitry coupled to the current mirrors and configured to detect a transition current in the current mirrors. The current feedback amplifier also includes a switched capacitor filter having an input coupled to the current mirrors. The switched capacitor filter is turned OFF responsive to the detection of the transition current by the phase detector circuitry. The current feedback amplifier also includes an output stage having an input coupled to the switched capacitor filter and is configured to produce an output signal.
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公开(公告)号：US09793707B2
公开(公告)日：2017-10-17
申请号：US13903736
申请日：2013-05-28
Applicant: TEXAS INSTRUMENTS INCORPORATED
Inventor： Hector Torres , Charles Parkhurst
CPC classification number: H02H9/02 , G05F1/5735 , G05F1/575 , H02H9/001
Abstract: Apparatus disclosed herein implement a fast transient precision current limiter such as may be included in an electronic voltage regulator. The current limiter includes two current sense element/current clamp control loops. A fast response time control loop first engages and clamps a current spike. A precision control loop then engages to more accurately clamp the output current to a programmed set point. The precision clamping loop includes an inner loop to linearize the precision current sense element. The inner loop forces the drain-to-source voltage (VDS) of the precision sense element to track the VDS of the regulator pass element. A more precise clamping operation results. Overall speed is not sacrificed as the fast response time clamping loop operates in parallel to protect circuitry while the precision clamping loop engages.
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公开(公告)号：US09571051B2
公开(公告)日：2017-02-14
申请号：US14674220
申请日：2015-03-31
Applicant: Texas Instruments Incorporated
Inventor： Charles Parkhurst , Hector Torres
CPC classification number: H03F3/45928 , H03F3/45179 , H03F3/45475 , H03F3/45632 , H03F2200/261 , H03F2203/45116 , H03F2203/45522 , H03F2203/45528
Abstract: An instrumentation amplifier (INA) that includes a first amplifier and a second amplifier coupled to the first amplifier. The first amplifier includes a first transistor. The first amplifier is configured to receive a positive phase signal of a differential signal. The second amplifier includes a second transistor and is configured to receive a negative phase signal of the differential signal. The first and second transistors each include a gate, source, and drain. The first transistor drain is connected to the second transistor drain.
Abstract translation: 一种仪表放大器（INA），包括耦合到第一放大器的第一放大器和第二放大器。 第一放大器包括第一晶体管。 第一放大器被配置为接收差分信号的正相位信号。 第二放大器包括第二晶体管，并且被配置为接收差分信号的负相位信号。 第一和第二晶体管各自包括栅极，源极和漏极。 第一晶体管漏极连接到第二晶体管漏极。
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公开(公告)号：US20240329164A1
公开(公告)日：2024-10-03
申请号：US18193099
申请日：2023-03-30
Applicant: TEXAS INSTRUMENTS INCORPORATED
Inventor： Dok Won Lee , Keith Ryan Green , Fanping Sui , Charles Parkhurst
CPC classification number: G01R33/077 , G01R33/0011 , H10N52/01 , H10N52/80
Abstract: The present disclosure generally relates to magnetic field sensors with magnetic flux concentrators, and more particularly, to Hall sensors (which may be vertical or in-plane field Hall sensors) with magnetic flux concentrators. In an example, a sensor device includes a semiconductor die, a first magnetic flux concentrator, and a second magnetic flux concentrator. The semiconductor die includes a semiconductor substrate and an interconnect structure. The semiconductor substrate includes a Hall sensor in a semiconductor material. The interconnect structure is over the semiconductor substrate. The first magnetic flux concentrator is over the semiconductor die. The second magnetic flux concentrator is over the semiconductor die. At least part of the Hall sensor is laterally between the first magnetic flux concentrator and the second magnetic flux concentrator.
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公开(公告)号：US11658626B2
公开(公告)日：2023-05-23
申请号：US17350817
申请日：2021-06-17
Applicant: Texas Instruments Incorporated
CPC classification number: H03F3/45269 , H03F2200/261
Abstract: A two-stage differential amplifier with cross-coupled compensation capacitors. The differential amplifier includes first amplifier circuitry receiving a differential input voltage and presenting first and second intermediate outputs. The amplifier further includes a second amplifier stage with a first leg having an input coupled to the second intermediate output of the first amplifier circuitry, and a second leg having an input coupled to the first intermediate output of the first amplifier circuitry. A compensation capacitor is provided for each leg of the second amplifier stage, each coupled between the output of that amplifier leg and its input. A first cross-coupled capacitor is coupled between the output of the first amplifier leg to the input of the second amplifier leg, and a second cross-coupled capacitor is coupled between the output of the second amplifier leg and the input of the first amplifier leg.
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公开(公告)号：US10284157B2
公开(公告)日：2019-05-07
申请号：US15392117
申请日：2016-12-28
Applicant: TEXAS INSTRUMENTS INCORPORATED
Inventor： Charles Parkhurst
IPC: H03F3/45
Abstract: An amplifier includes a dynamic bias circuit and an amplification circuit coupled to the dynamic bias circuit. The dynamic bias circuit includes a plurality of transistors coupled to a plurality of resistors. The dynamic bias circuit is configured to generate a bias current with a magnitude that increases in response to the dynamic bias circuit receiving a falling edge of an input signal and decreases in response to the dynamic bias circuit receiving a rising edge of the input signal. The amplification circuit is configured to receive the bias current and amplify the input signal based on the bias current to generate an output signal that has a higher slew rate for a falling signal than for a rising signal.
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公开(公告)号：US20140355161A1
公开(公告)日：2014-12-04
申请号：US13903736
申请日：2013-05-28
Applicant: TEXAS INSTRUMENTS INCORPORATED
Inventor： Hector Torres , Charles Parkhurst
IPC: H02H9/02
CPC classification number: H02H9/02 , G05F1/5735 , G05F1/575 , H02H9/001
Abstract: Apparatus disclosed herein implement a fast transient precision current limiter such as may be included in an electronic voltage regulator. The current limiter includes two current sense element/current clamp control loops. A fast response time control loop first engages and clamps a current spike. A precision control loop then engages to more accurately clamp the output current to a programmed set point. The precision clamping loop includes an inner loop to linearize the precision current sense element. The inner loop forces the drain-to-source voltage (VDS) of the precision sense element to track the VDS of the regulator pass element. A more precise clamping operation results. Overall speed is not sacrificed as the fast response time clamping loop operates in parallel to protect circuitry while the precision clamping loop engages.
Abstract translation: 本文公开的装置实现快速瞬态精密限流器，例如可以包括在电子电压调节器中。 电流限制器包括两个电流检测元件/电流钳位控制回路。 快速响应时间控制回路首先接合并夹紧电流尖峰。 然后，精密控制回路接合以更精确地将输出电流钳位到编程的设定点。 精密钳位回路包括一个线性化精密电流检测元件的内环。 内部环路迫使精密检测元件的漏极 - 源极电压（VDS）跟踪调节器通过元件的VDS。 更精确的夹紧操作结果。 总体速度不会因为快速响应时间钳位回路并联运行而在精密钳位回路啮合时保护电路而牺牲。
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公开(公告)号：US20240213931A1
公开(公告)日：2024-06-27
申请号：US18088096
申请日：2022-12-23
Applicant: TEXAS INSTRUMENTS INCORPORATED
Inventor： Charles Parkhurst , Jay Lundy
CPC classification number: H03F3/04 , G01R15/202 , H03F2200/165 , H03F2200/171 , H03F2200/261
Abstract: An electronic system includes a bipolar junction transistor (BJT) input stage circuit having a first BJT input, a second BJT input, a first BJT output, a second BJT output, and a BJT voltage input. An amplifier has a first amplifier input, a second amplifier input, and an amplifier output. The first amplifier input is coupled to the first BJT output and the second amplifier input is coupled to the second BJT output. The second BJT input is coupled to the amplifier output. A base current compensator has a first base compensator output, a second base compensator output, and a base compensator voltage output. The first base compensator output is coupled to the first BJT input and the second base compensator output is coupled to the second BJT input. The base compensator voltage output is coupled to the BJT voltage input.
