公开(公告)号：US08766456B2

公开(公告)日：2014-07-01

申请号：US13660223

申请日：2012-10-25

Applicant: Siliconware Precision Industries Co., Ltd.

Inventor： Hsi-Chang Hsu ,  Hsin-Hung Chou ,  Hung-Wen Liu ,  Hsin-Yi Liao ,  Chiang-Cheng Chang

IPC: H01L23/48 ,  H01L23/52 ,  H01L29/40

CPC classification number: H01L23/49816 ,  H01L21/568 ,  H01L23/3128 ,  H01L23/49822 ,  H01L23/49827 ,  H01L23/5389 ,  H01L24/19 ,  H01L25/105 ,  H01L2224/04105 ,  H01L2224/12105 ,  H01L2224/73267 ,  H01L2224/82005 ,  H01L2225/1035 ,  H01L2225/1058 ,  H01L2924/12042 ,  H01L2924/15311 ,  H01L2924/00

Abstract: A method of fabricating a semiconductor package is provided, including: disposing a semiconductor element on a carrier; forming an encapsulant on the carrier to encapsulant the semiconductor element; forming at least one through hole penetrating the encapsulant; forming a hollow conductive through hole in the through hole and, at the same time, forming a circuit layer on an active surface of the semiconductor element and the encapsulant; forming an insulating layer on the circuit layer; and removing the carrier. By forming the conductive through hole and the circuit layer simultaneously, the invention eliminates the need to form a dielectric layer before forming the circuit layer and dispenses with the conventional chemical mechanical polishing (CMP) process, thus greatly improving the fabrication efficiency.

Abstract translation: 提供一种制造半导体封装的方法，包括：将半导体元件设置在载体上; 在所述载体上形成密封剂以密封所述半导体元件; 形成穿透所述密封剂的至少一个通孔; 在通孔中形成中空的导电通孔，同时在半导体元件的有源表面和密封剂上形成电路层; 在电路层上形成绝缘层; 并移除载体。 通过同时形成导电通孔和电路层，本发明消除了在形成电路层之前形成电介质层并省去常规化学机械抛光（CMP）工艺的需要，从而大大提高了制造效率。