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公开(公告)号：US20220375524A1
公开(公告)日：2022-11-24
申请号：US17323708
申请日：2021-05-18
Applicant: SanDisk Technologies LLC
Inventor： Dengtao Zhao , Ravi Kumar , Chin-Yi Chen , Ryohei Shoji
Abstract: A nonvolatile memory control method includes a step of writing, repeatedly to a nonvolatile memory cells. The method continues with detecting when writing reaches a writing threshold value. Upon reaching the writing threshold, the method continues with driving a charge to at least one parasitic area intermediate at least two charge storage areas of the nonvolatile memory cells to improve data retention in at least one of the at least two charge storage areas of the nonvolatile memory cells.
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公开(公告)号：US12079496B2
公开(公告)日：2024-09-03
申请号：US17901310
申请日：2022-09-01
Applicant: SanDisk Technologies LLC
Inventor： Chin-Yi Chen , Muhammad Masuduzzaman , Xiang Yang
IPC: G06F3/06
CPC classification number: G06F3/0632 , G06F3/0604 , G06F3/0679
Abstract: Technology is disclosed herein for managing timing parameters when programming memory cells. Timing parameters used sub-clocks in an MLC program mode may also be used for those same sub-clocks in a first SLC program mode. However, in a second SLC program mode a different set of timing parameters may be used for that set of sub-clocks. Using the same set of timing parameters for the MLC program mode and the first SLC program mode saves storage space. However, the timing parameters for the MLC program mode may be slower than desired for SLC programming. A different set of timing parameters may be used for the second SLC program mode to provide for faster program operation. Moreover, the different set of timing parameters used for the faster SLC program mode do not require storage of a separate set of timing parameters.
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公开(公告)号：US11508440B1
公开(公告)日：2022-11-22
申请号：US17323708
申请日：2021-05-18
Applicant: SanDisk Technologies LLC
Inventor： Dengtao Zhao , Ravi Kumar , Chin-Yi Chen , Ryohei Shoji
Abstract: A nonvolatile memory control method includes a step of writing, repeatedly to a nonvolatile memory cells. The method continues with detecting when writing reaches a writing threshold value. Upon reaching the writing threshold, the method continues with driving a charge to at least one parasitic area intermediate at least two charge storage areas of the nonvolatile memory cells to improve data retention in at least one of the at least two charge storage areas of the nonvolatile memory cells.
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4.发明公开
公开(公告)号：US20240274200A1
公开(公告)日：2024-08-15
申请号：US18225375
申请日：2023-07-24
Applicant: SanDisk Technologies LLC
Inventor： Chin-Yi Chen , Muhammad Masuduzzaman , Xiang Yang
CPC classification number: G11C16/10 , G11C16/0483 , G11C16/30
Abstract: A memory apparatus and method of operation are provided. The apparatus includes memory cells connected to word lines and disposed in strings and configured to retain a threshold voltage corresponding to one of a plurality of data states. A control means is coupled to the word lines and the strings and is configured to successively apply one of a series of pulses of a program voltage to each selected one of the word lines to program the memory cells connected thereto during a program operation. The control means is also configured to utilize a time of a preliminary period of the program operation based on the one of the series of pulses of the program voltage being applied. The preliminary period of the program operation is before the series of pulses of the program voltage are applied to each selected one of the plurality of word lines.
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公开(公告)号：US20240078028A1
公开(公告)日：2024-03-07
申请号：US17901310
申请日：2022-09-01
Applicant: SanDisk Technologies LLC
Inventor： Chin-Yi Chen , Muhammad Masuduzzaman , Xiang Yang
IPC: G06F3/06
CPC classification number: G06F3/0632 , G06F3/0604 , G06F3/0679
Abstract: Technology is disclosed herein for managing timing parameters when programming memory cells. Timing parameters used sub-clocks in an MLC program mode may also be used for those same sub-clocks in a first SLC program mode. However, in a second SLC program mode a different set of timing parameters may be used for that set of sub-clocks. Using the same set of timing parameters for the MLC program mode and the first SLC program mode saves storage space. However, the timing parameters for the MLC program mode may be slower than desired for SLC programming. A different set of timing parameters may be used for the second SLC program mode to provide for faster program operation. Moreover, the different set of timing parameters used for the faster SLC program mode do not require storage of a separate set of timing parameters.
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6.发明公开
公开(公告)号：US20230326530A1
公开(公告)日：2023-10-12
申请号：US17715647
申请日：2022-04-07
Applicant: SanDisk Technologies LLC
Inventor： Chin-Yi Chen , Muhammad Masuduzzaman , Kou Tei , Deepanshu Dutta , Hiroyuki Mizukoshi , Jiahui Yuan , Xiang Yang
CPC classification number: G11C16/26 , G11C16/08 , G11C16/3459 , G11C16/0483 , G11C16/10 , G11C11/5621
Abstract: A memory apparatus and method of operation is provided. The apparatus includes memory cells connected to word lines. The memory cells are disposed in memory holes and grouped into a plurality of tiers. The memory cells are configured to retain a threshold voltage corresponding to one of a plurality of data states to store one bit as single-level cells and a plurality of bits as multi-level cells. The apparatus also includes a control means coupled to the word lines and the memory holes and configured to select a predetermined strobe quantity of the plurality of tiers of the memory cells separately for the memory cells operating as the single-level cells and the memory cells operating as the multi-level cells. The control means is also configured to trigger sensing of the predetermined strobe quantity of the plurality of tiers of the memory cells during a verify operation.
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公开(公告)号：US11574693B2
公开(公告)日：2023-02-07
申请号：US17347772
申请日：2021-06-15
Applicant: SanDisk Technologies LLC
Inventor： Chin-Yi Chen , Muhammad Masuduzzaman , Dengtao Zhao , Anubhav Khandelwal , Ravi Kumar
Abstract: A memory apparatus and method of operation are provided. The apparatus includes memory cells connected to one of a plurality of word lines and arranged in strings and configured to retain a threshold voltage corresponding to one of a plurality of memory states. A control circuit is coupled to the plurality of word lines and strings and is configured to erase the memory cells using a stripe erase operation in response to determining a cycle count is less than a predetermined cycle count maximum threshold. The control circuit is also configured to perform a dummy cycle operation in response to determining the cycle count is not less than the predetermined cycle count maximum threshold.
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公开(公告)号：US12198765B2
公开(公告)日：2025-01-14
申请号：US17750938
申请日：2022-05-23
Applicant: SanDisk Technologies LLC
Inventor： Xiang Yang , Chin-Yi Chen , Deepanshu Dutta
Abstract: A memory apparatus and method of operation are provided. The apparatus includes memory cells each connected to word lines and disposed in strings and configured to retain a threshold voltage. The memory apparatus also includes a charge pump configured to ramp up to a program voltage in a pump setting process and supply the program voltage to the word lines during a program operation and ramp down from the program voltage in a pump resetting process. A control means is configured to successively apply one of a series of pulses of the program voltage from the charge pump to each selected one of the word lines to program the memory cells during the program operation. The control means is also configured to skip the pump setting process and the pump resetting process of the charge pump in between each of the series of pulses of the program voltage.
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9.发明授权
公开(公告)号：US12057175B2
公开(公告)日：2024-08-06
申请号：US17715647
申请日：2022-04-07
Applicant: SanDisk Technologies LLC
Inventor： Chin-Yi Chen , Muhammad Masuduzzaman , Kou Tei , Deepanshu Dutta , Hiroyuki Mizukoshi , Jiahui Yuan , Xiang Yang
CPC classification number: G11C16/26 , G11C16/0483 , G11C16/08 , G11C16/10 , G11C16/3459 , G11C11/5621 , G11C11/5671
Abstract: A memory apparatus and method of operation is provided. The apparatus includes memory cells connected to word lines. The memory cells are disposed in memory holes and grouped into a plurality of tiers. The memory cells are configured to retain a threshold voltage corresponding to one of a plurality of data states to store one bit as single-level cells and a plurality of bits as multi-level cells. The apparatus also includes a control means coupled to the word lines and the memory holes and configured to select a predetermined strobe quantity of the plurality of tiers of the memory cells separately for the memory cells operating as the single-level cells and the memory cells operating as the multi-level cells. The control means is also configured to trigger sensing of the predetermined strobe quantity of the plurality of tiers of the memory cells during a verify operation.
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公开(公告)号：US20230377657A1
公开(公告)日：2023-11-23
申请号：US17750938
申请日：2022-05-23
Applicant: SanDisk Technologies LLC
Inventor： Xiang Yang , Chin-Yi Chen , Deepanshu Dutta
CPC classification number: G11C16/102 , G11C16/26 , G11C16/08 , G11C16/3404 , G11C16/24
Abstract: A memory apparatus and method of operation are provided. The apparatus includes memory cells each connected to word lines and disposed in strings and configured to retain a threshold voltage. The memory apparatus also includes a charge pump configured to ramp up to a program voltage in a pump setting process and supply the program voltage to the word lines during a program operation and ramp down from the program voltage in a pump resetting process. A control means is configured to successively apply one of a series of pulses of the program voltage from the charge pump to each selected one of the word lines to program the memory cells during the program operation. The control means is also configured to skip the pump setting process and the pump resetting process of the charge pump in between each of the series of pulses of the program voltage.
