公开(公告)号：US20230326871A1

公开(公告)日：2023-10-12

申请号：US18131258

申请日：2023-04-05

Applicant: Samsung Electronics Co., Ltd.

Inventor： Junghoon Kang ,  Seungwan Shin ,  Byungmin Yu ,  Junghyun Lee

IPC: H01L23/544 ,  H01L25/10 ,  H01L23/498 ,  H01L23/31 ,  B23K26/364

CPC classification number: H01L23/544 ,  H01L25/105 ,  H01L23/49833 ,  H01L23/49838 ,  H01L23/49816 ,  H01L24/48 ,  B23K26/364 ,  H01L2225/1023 ,  H01L2225/1041 ,  H01L2225/1058 ,  H01L23/3135

Abstract: A semiconductor package includes an encapsulation layer encapsulating at least one semiconductor chip, and a redistribution level layer disposed on the encapsulation layer. The redistribution level layer includes a redistribution layer and a redistribution insulating layer insulating the redistribution layer, a laser mark area is disposed on the redistribution layer and the redistribution insulating layer, and the redistribution insulating layer of the laser mark area comprises a plurality of mesh-type redistribution insulating patterns arranged apart from each other on a plane and surrounded by the redistribution layer. The redistribution level layer includes a laser mark insulating layer located on the redistribution layer and the redistribution insulating layer, wherein the laser mark insulating layer includes a laser mark exposing the redistribution layer and the mesh-type redistribution insulating patterns in the laser mark area.

公开(公告)号：US20240213174A1

公开(公告)日：2024-06-27

申请号：US18515797

申请日：2023-11-21

Applicant: Samsung Electronics Co., Ltd.

Inventor： Junghoon Kang ,  Unbyoung Kang ,  Jinsu Kim ,  Seungwan Shin ,  Byoungwook Jang

IPC: H01L23/544 ,  H01L23/00 ,  H01L23/31 ,  H01L23/498 ,  H01L25/065 ,  H01L25/10

CPC classification number: H01L23/544 ,  H01L23/3128 ,  H01L23/49811 ,  H01L24/16 ,  H01L24/20 ,  H01L25/0657 ,  H01L25/105 ,  H01L2223/54433 ,  H01L2224/16225 ,  H01L2224/21 ,  H01L2225/06506 ,  H01L2225/0651 ,  H01L2225/06562

Abstract: A semiconductor package includes a lower redistribution wiring layer having a first region and a second region adjacent the first region and including first redistribution wirings; a semiconductor chip on the first region of the lower redistribution wiring layer and electrically connected to the first redistribution wirings; a sealing member on a side surface of the semiconductor chip and on the lower redistribution wiring layer; a plurality of vertical conductive structures penetrating the sealing member on the second region of the lower redistribution wiring layer and electrically connected to the first redistribution wirings; a marking pattern on the semiconductor chip; seed layer pads on respective end portions of the vertical conductive structures that are exposed by the sealing member at an upper surface thereof; and an upper redistribution wiring layer on the sealing member and the marking pattern and including second redistribution wirings.

公开(公告)号：US20250054870A1

公开(公告)日：2025-02-13

申请号：US18926130

申请日：2024-10-24

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Woonchun Kim ,  Seungwan Shin ,  Gun Lee

IPC: H01L23/538 ,  H01L21/48 ,  H01L21/768 ,  H01L23/31 ,  H01L23/48 ,  H01L23/498 ,  H01L23/522 ,  H01L23/528 ,  H01L23/532 ,  H01L25/10

Abstract: A semiconductor package includes; a first redistribution structure including first redistribution conductors, a semiconductor chip on the first redistribution structure and including connection pads electrically connecting the first redistribution conductors, a connection conductor on the first redistribution structure, laterally spaced apart from the semiconductor chip, and electrically connected to the first redistribution conductors, an encapsulant on the first redistribution structure and sealing the semiconductor chip and at least a portion of the connection conductor, a barrier layer extending along an upper surface of the encapsulant, and a second redistribution conductor on the barrier layer and penetrating the barrier layer to contact the connection conductor.

公开(公告)号：US20250038122A1

公开(公告)日：2025-01-30

申请号：US18596207

申请日：2024-03-05

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Junghoon KANG ,  Seungwan Shin ,  Jung Hyun Lee

IPC: H01L23/544 ,  H01L23/00 ,  H01L23/498 ,  H01L25/065

Abstract: Provided is a semiconductor package including a first redistribution substrate including a first redistribution insulating layer and a first redistribution via, a first insulating layer on the first redistribution substrate, a solder pad on the first insulating layer, a first alignment key penetrating the first insulating layer and extending to an inside of the first redistribution insulating layer, and a solder via spaced apart from the first alignment key and electrically connected to the solder pad, wherein the first alignment key includes a first key body extending from a first surface of the first insulating layer to the inside of the first redistribution substrate, and a first key protrusion protruding from a side surface of the first key body toward the first insulating layer, and wherein the first insulating layer includes a non-photosensitive material.

公开(公告)号：US12154859B2

公开(公告)日：2024-11-26

申请号：US17707002

申请日：2022-03-29

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Woonchun Kim ,  Seungwan Shin ,  Gun Lee

IPC: H01L23/538 ,  H01L21/48 ,  H01L21/768 ,  H01L23/31 ,  H01L23/48 ,  H01L23/498 ,  H01L23/522 ,  H01L23/528 ,  H01L23/532 ,  H01L25/10

Abstract: A semiconductor package includes; a first redistribution structure including first redistribution conductors, a semiconductor chip on the first redistribution structure and including connection pads electrically connecting the first redistribution conductors, a connection conductor on the first redistribution structure, laterally spaced apart from the semiconductor chip, and electrically connected to the first redistribution conductors, an encapsulant on the first redistribution structure and sealing the semiconductor chip and at least a portion of the connection conductor, a barrier layer extending along an upper surface of the encapsulant, and a second redistribution conductor on the barrier layer and penetrating the barrier layer to contact the connection conductor.