公开(公告)号：US12225796B2

公开(公告)日：2025-02-11

申请号：US16925186

申请日：2020-07-09

Applicant: Samsung Display Co., LTD.

Inventor： Jun Hyun Park ,  Dong Woo Kim ,  Sung Jae Moon ,  Kang Moon Jo

IPC: H10K59/131

Abstract: An organic light emitting diode display includes a clock wiring circuit including a first signal line and a second signal line, a resistance adjusting circuit including a first lower resistance line and a first upper resistance line connected to the first signal line and a second lower resistance line and a second upper resistance line connected to the second signal line, and a gate driving circuit connected to the resistance adjusting circuit. The second signal line is disposed closer to the gate driving circuit than the first signal line, the first lower resistance line and the second lower resistance line have higher resistivity than the first upper resistance line and the second upper resistance line, respectively, the first lower resistance line is shorter than the second lower resistance line, and the first upper resistance line is longer than the second upper resistance line.

公开(公告)号：US12198607B2

公开(公告)日：2025-01-14

申请号：US17982919

申请日：2022-11-08

Applicant: Samsung Display Co., LTD.

Inventor： Jun Hyun Park ,  Dong Woo Kim ,  An Su Lee ,  Kang Moon Jo

IPC: G09G3/32

Abstract: A display device includes a substrate including a display area and a non-display area around the display area; a transistor on the substrate; an insulating layer on the transistor; a power voltage line on the insulating layer and transferring a power voltage; a data line on the insulating layer and transferring a data voltage; and an auxiliary wire between the substrate and the power voltage line in the display area. The auxiliary wire includes a portion overlapping the power voltage line and a portion overlapping the data line in a plan view and is electrically connected to the power voltage line.

公开(公告)号：US12131703B2

公开(公告)日：2024-10-29

申请号：US17641095

申请日：2019-11-26

Applicant: Samsung Display Co., LTD.

Inventor： Jun Hyun Park ,  Dong Woo Kim ,  An Su Lee ,  Kang Moon Jo

IPC: G09G3/3266 ,  G09G3/3233 ,  G09G3/3291

CPC classification number: G09G3/3266 ,  G09G3/3291 ,  G09G3/3233 ,  G09G2300/0426 ,  G09G2300/0842 ,  G09G2310/061 ,  G09G2310/08 ,  G09G2320/0223

Abstract: A scan signal driving unit capable of reducing the RC delay of scan control lines in an ultra-high resolution display, such as 8K UHD. The scan signal driving unit includes a plurality of stages configured to sequentially output scan signals, first clock lines to which first clock signals are applied, and second clock lines to which second clock signals are applied. Each of the first clock lines includes a (1-1)-th metal pattern and a (1-2)-th metal pattern disposed on the (1-1)-th metal pattern. Each of the second clock lines includes a (2-1)-th metal pattern disposed on the same layer as one of the (1-1)-th metal pattern and the (1-2)-th metal pattern.

公开(公告)号：US11900882B2

公开(公告)日：2024-02-13

申请号：US17585838

申请日：2022-01-27

Applicant: SAMSUNG DISPLAY CO., LTD.

Inventor： Sung Jae Moon ,  Dong Woo Kim ,  Kang Moon Jo ,  Jun Hyun Park ,  An Su Lee

IPC: G09G3/3266 ,  G09G3/3291 ,  H10K59/124 ,  H10K59/131

CPC classification number: G09G3/3266 ,  G09G3/3291 ,  H10K59/124 ,  H10K59/131

Abstract: A display device includes a first conductive layer, a first insulation layer disposed on the first conductive layer, and active patterns disposed on the first insulation layer. The display device further includes a second conductive layer disposed on the active patterns and including a first gate electrode that overlaps a channel region of the active patterns and a driving gate electrode, a second insulation layer disposed on the second conductive layer, a third conductive layer including a capacitor electrode and at least one scan line disposed on the second insulation layer, a third insulation layer disposed on the third conductive layer, and an electrode layer including a first electrode disposed on the third insulation layer. The first electrode is connected to the capacitor electrode, the capacitor electrode overlaps the driving gate electrode, and the capacitor electrode and the driving gate electrode form a capacitor.

公开(公告)号：US11716883B2

公开(公告)日：2023-08-01

申请号：US17307859

申请日：2021-05-04

Applicant: Samsung Display Co., Ltd.

Inventor： Jun Hyun Park ,  Jang Mi Kang ,  Hyun Joon Kim ,  Hae Min Kim ,  Min Jae Jeong

IPC: H10K59/131 ,  G09G3/3233 ,  H10K59/122 ,  H10K50/813 ,  H10K59/35

CPC classification number: H10K59/131 ,  G09G3/3233 ,  H10K50/813 ,  H10K59/122 ,  H10K59/352 ,  G09G2300/0452 ,  G09G2300/0809

Abstract: A light emitting diode display device includes: a pixel circuit; a data line connected to the pixel circuit to transmit a data voltage; an anode on the pixel circuit and the data line; an emission layer on the anode; and a cathode on the emission layer. The anode includes a first anode and a second anode, and the data line extends across the first anode and the second anode.

公开(公告)号：US11705066B2

公开(公告)日：2023-07-18

申请号：US17886393

申请日：2022-08-11

Applicant: Samsung Display Co., Ltd.

Inventor： Jang Mi Kang ,  Jun Hyun Park ,  Min Jae Jeong

IPC: G09G3/3233 ,  H10K59/126 ,  H10K59/131 ,  H10K59/121

CPC classification number: G09G3/3233 ,  H10K59/126 ,  H10K59/1213 ,  H10K59/1216 ,  H10K59/131 ,  G09G2300/0413 ,  G09G2300/0819 ,  G09G2300/0852 ,  G09G2300/0861 ,  G09G2310/08 ,  G09G2320/0247 ,  G09G2320/0257 ,  G09G2330/021

Abstract: A pixel of display device includes a light emitting element, a first transistor coupled between first power source and a second node and having a gate electrode connected to a first node N1, and the first transistor being configured to control a driving current supplied to the light emitting element in response to a voltage of the first node, a first capacitor including one electrode connected to the first node and another electrode connected to a third node, a second transistor coupled between the third node and a data line, a third transistor coupled between the first node and the second node, a fourth transistor coupled between the first node and an initialization power source, a fifth transistor coupled between a reference power source and the third node, and an eighth transistor coupled between a fourth node and an anode initialization power source.

公开(公告)号：US11676544B2

公开(公告)日：2023-06-13

申请号：US17523412

申请日：2021-11-10

Applicant: SAMSUNG DISPLAY CO., LTD.

Inventor： Jun Hyun Park ,  An Su Lee ,  Dong Woo Kim ,  Sung Jae Moon ,  Kang Moon Jo

IPC: G09G3/3291 ,  H01L27/32

CPC classification number: G09G3/3291 ,  H01L27/3276 ,  G09G2300/0426

Abstract: An organic light emitting diode display including: a data wiring that includes a main data line disposed in a display area and a first data line disposed in a peripheral area; a driving voltage wiring that includes a main driving voltage line disposed in the display area and a first driving voltage line that is connected with the main driving voltage line and disposed in the peripheral area while extending in a first direction; and a driving low-voltage wiring that includes a cathode extending to the peripheral area while overlapping the display area, and a plurality of first driving low-voltage connection portions that are connected with the cathode and disposed in the peripheral area, wherein each of the plurality of first driving low-voltage connection portions comprises a wiring portion extended in the first direction and a pad portion electrically connected with the wiring portion.

公开(公告)号：US11521541B2

公开(公告)日：2022-12-06

申请号：US16872941

申请日：2020-05-12

Applicant: Samsung Display Co., LTD.

Inventor： Jun Hyun Park ,  Dong Woo Kim ,  An Su Lee ,  Kang Moon Jo

IPC: G09G3/32

Abstract: A display device includes a substrate including a display area and a non-display area around the display area; a transistor on the substrate; an insulating layer on the transistor; a power voltage line on the insulating layer and transferring a power voltage; a data line on the insulating layer and transferring a data voltage; and an auxiliary wire between the substrate and the power voltage line in the display area. The auxiliary wire includes a portion overlapping the power voltage line and a portion overlapping the data line in a plan view and is electrically connected to the power voltage line.

公开(公告)号：US11200849B2

公开(公告)日：2021-12-14

申请号：US17115367

申请日：2020-12-08

Applicant: Samsung Display Co., Ltd.

Inventor： Jun Hyun Park ,  Cheol-Gon Lee ,  Yang-Hwa Choi

IPC: G09G3/3266 ,  G09G3/3225 ,  G09G3/3275 ,  G09G3/3233

Abstract: A display device including: a scan driver that transmits scan signals to scan lines; a data driver that data signals to data lines; and a display portion that includes pixels, respectively connected to the corresponding scan lines and corresponding data lines, and displays an image by the pixels that simultaneously emit light according to the corresponding data signals, wherein each of pixels includes: an organic light emitting diode; a first transistor that includes a gate connected to a first node, and is connected between first power and an anode of the organic light emitting diode; a second transistor that includes a gate connected to a corresponding scan line and transmits the corresponding data signal to the first node; and a first capacitor that is connected to the first node, and stores a data voltage according to the data signal.

公开(公告)号：US10991314B2

公开(公告)日：2021-04-27

申请号：US16700968

申请日：2019-12-02

Applicant: Samsung Display Co., Ltd.

Inventor： Jun Hyun Park ,  Dong Woo Kim ,  Sung Jae Moon ,  An Su Lee ,  Kang Moon Jo

IPC: G06F3/038 ,  G09G5/00 ,  G09G5/10 ,  G09G3/3266 ,  G09G3/3275 ,  G09G3/3233

Abstract: A scan driver includes stages for outputting scan signals. An nth stage includes: a first driving controller for controlling a voltage of a first node and a voltage of a second node in response to a previous carry signal; a second driving controller for controlling a voltage of a first driving node, based on a sensing-on signal, a next carry signal, the voltage of a first power source, the voltage of the first node, and a voltage of a sampling node, and controlling a voltage of a second driving node, based on the voltage of the sampling node and a sensing clock signal; an output buffer for outputting a carry signal and the scan signal; and a connection controller for electrically coupling the first node and the first driving node and electrically coupling the second node and the second driving node, in response to a display-on signal.