公开(公告)号：US20130259146A1

公开(公告)日：2013-10-03

申请号：US13854419

申请日：2013-04-01

Applicant: STMICROELECTRONICS S.R.L.

Inventor： Daniele Mangano ,  Salvatore Pisasale ,  Carmelo Pistritto

IPC: H03M13/00 ,  H03M13/51

CPC classification number: H03M13/6522 ,  G06F13/4286 ,  H03M13/51

Abstract: A completion-detector circuit for detecting completion of the transfer of asynchronous data on a communication channel with signal lines organized according to a delay-insensitive encoding (e.g., dual-rail, m-of-n, Berger encoding) comprises: logic circuitry for detecting the data on the aforesaid signal lines configured for: i) producing a first signal indicating the fact that the asynchronous data on the signal lines are stable; ii) producing a second signal indicating the fact that the signal lines are de-asserted; and an asynchronous finite-state machine supplied with the first signal and the second signal for producing a signal of detection of completion of transfer of the asynchronous data, the detection signal having: a first value, when the first signal is asserted; and a second value, when the second signal is asserted; and being on hold when neither one nor the other of said first signal and said second signal is asserted.

Abstract translation: 一种完成检测器电路，用于检测在根据延迟不敏感编码（例如，双轨，m-of-n，Berger编码）组织的信号线在通信信道上完成异步数据的传输，包括：用于 检测上述信号线上的数据，其配置用于：i）产生指示信号线上的异步数据是稳定的事实的第一信号; ii）产生指示信号线被断言的事实的第二信号; 以及提供有第一信号和第二信号的异步有限状态机，用于产生检测异步数据传输完成的信号，检测信号具有：第一值，当第一信号被断言时; 以及第二值，当所述第二信号被断言时; 并且当所述第一信号和所述第二信号的一个或另一个被断言时，它们处于保持状态。

公开(公告)号：US09191033B2

公开(公告)日：2015-11-17

申请号：US13854419

申请日：2013-04-01

Applicant: STMicroelectronics S.r.l.

Inventor： Daniele Mangano ,  Salvatore Pisasale ,  Carmelo Pistritto

IPC: H04L27/00 ,  H03M13/00 ,  H03M13/51 ,  G06F13/42

CPC classification number: H03M13/6522 ,  G06F13/4286 ,  H03M13/51

Abstract: A completion-detector circuit for detecting completion of the transfer of asynchronous data on a communication channel with signal lines organized according to a delay-insensitive encoding (e.g., dual-rail, m-of-n, Berger encoding) comprises: logic circuitry for detecting the data on the aforesaid signal lines configured for: i) producing a first signal indicating the fact that the asynchronous data on the signal lines are stable; ii) producing a second signal indicating the fact that the signal lines are de-asserted; and an asynchronous finite-state machine supplied with the first signal and the second signal for producing a signal of detection of completion of transfer of the asynchronous data, the detection signal having: a first value, when the first signal is asserted; and a second value, when the second signal is asserted; and being on hold when neither one nor the other of said first signal and said second signal is asserted.

Abstract translation: 一种完成检测器电路，用于检测在根据延迟不敏感编码（例如，双轨，m-of-n，Berger编码）组织的信号线在通信信道上完成异步数据的传输，包括：用于 检测上述信号线上的数据，其配置用于：i）产生指示信号线上的异步数据是稳定的事实的第一信号; ii）产生指示信号线被断言的事实的第二信号; 以及提供有第一信号和第二信号的异步有限状态机，用于产生检测异步数据传输完成的信号，检测信号具有：第一值，当第一信号被断言时; 以及第二值，当所述第二信号被断言时; 并且当所述第一信号和所述第二信号的一个或另一个被断言时，它们处于保持状态。