公开(公告)号：US20240266425A1

公开(公告)日：2024-08-08

申请号：US18422867

申请日：2024-01-25

Applicant: STMicroelectronics International N.V.

Inventor： Aurore CONSTANT ,  Ferdinando IUCOLANO ,  Cristina TRINGALI ,  Maria Eloisa CASTAGNA

IPC: H01L29/778 ,  H01L29/66

CPC classification number: H01L29/778 ,  H01L29/66462

Abstract: The present disclosure relates to a method of forming an HEMT transistor, comprising the following successive steps: a) providing a stack comprising a semiconductor channel layer, a semiconductor barrier layer on top of and in contact with the semiconductor channel layer, and a semiconductor gate layer arranged on top of and in contact with the semiconductor barrier layer, the semiconductor gate layer comprising P-type dopant elements; and b) compensating for the P-type doping with oxygen atoms, in an upper portion of the semiconductor gate layer, by an oxygen anneal, so as to define a PN junction at the interface between the upper portion and a central portion of the semiconductor gate layer.

公开(公告)号：US20240194763A1

公开(公告)日：2024-06-13

申请号：US18523185

申请日：2023-11-29

Applicant: STMicroelectronics International N.V.

Inventor： Aurore CONSTANT ,  Ferdinando IUCOLANO ,  Cristina TRINGALI

IPC: H01L29/66 ,  H01L29/20 ,  H01L29/205 ,  H01L29/778

CPC classification number: H01L29/66462 ,  H01L29/2003 ,  H01L29/205 ,  H01L29/7786

Abstract: The present disclosure relates to a HEMT transistor comprising a first semiconductor layer, a gate arranged on a first surface of the first semiconductor layer, a first passivation layer made of a first material on the sides of the gate, the first passivation layer further extending over a first portion of said surface of the first semiconductor layer, and a second passivation layer made of a second material different from the first material on a second portion of said surface of the first semiconductor layer next to the first passivation layer.

公开(公告)号：US20240405115A1

公开(公告)日：2024-12-05

申请号：US18671584

申请日：2024-05-22

Applicant: STMicroelectronics International N.V.

Inventor： Maria Eloisa CASTAGNA ,  Giovanni GIORGINO ,  Ferdinando IUCOLANO ,  Cristina TRINGALI ,  Aurore CONSTANT

IPC: H01L29/778 ,  H01L21/02 ,  H01L29/20 ,  H01L29/40 ,  H01L29/66

Abstract: A HEMT device including: a semiconductor body forming a heterostructure; a gate region on the semiconductor body and elongated along a first axis; a gate metal region including a lower portion on the gate region and recessed with respect to the gate region, and a upper portion on the lower portion and having a width greater that the lower portion along a second axis; a source metal region extending on the semiconductor body and made in part of aluminum; a drain metal region on the semiconductor body, the source metal region and the drain metal region on opposite sides of the gate region; a first conductivity enhancement region of aluminum nitride, extending on the semiconductor body and interposed between the source metal region and the gate region, the first conductivity enhancement region being in direct contact with the source metal region and being separated from the gate region.

公开(公告)号：US20240274702A1

公开(公告)日：2024-08-15

申请号：US18424471

申请日：2024-01-26

Applicant: STMicroelectronics International N.V.

Inventor： Aurore CONSTANT ,  Ferdinando IUCOLANO ,  Cristina TRINGALI ,  Maria Eloisa CASTAGNA

IPC: H01L29/778 ,  H01L29/20 ,  H01L29/205 ,  H01L29/66

CPC classification number: H01L29/778 ,  H01L29/2003 ,  H01L29/205 ,  H01L29/66462

Abstract: A HEMT transistor includes: a first semiconductor layer; a gate located on a first face of the first semiconductor layer; and a first passivating layer made of a first dielectric material which extends over the said first face of the first semiconductor layer, the sides of the gate, and at least a peripheral portion of a face of the gate opposite with respect to the first semiconductor layer, wherein a second passivating layer made of a second dielectric material extends between the said face of the gate and the first passivating layer, the sides of the gate being free of the said second passivating layer.

公开(公告)号：US20240332413A1

公开(公告)日：2024-10-03

申请号：US18612646

申请日：2024-03-21

Applicant: STMicroelectronics International N.V.

Inventor： Ferdinando IUCOLANO ,  Alessandro CHINI ,  Maria Eloisa CASTAGNA ,  Aurore CONSTANT ,  Cristina TRINGALI

IPC: H01L29/778 ,  H01L29/20 ,  H01L29/423 ,  H01L29/66

CPC classification number: H01L29/7787 ,  H01L29/2003 ,  H01L29/42316 ,  H01L29/66462

Abstract: The HEMT device has a body including a heterostructure configured to generate a 2-dimensional charge-carrier gas; and a gate structure which extends on a top surface of the body and is biasable to electrically control the 2-dimensional charge-carrier gas. The gate structure has a channel modulating region of semiconductor material; a functional region of semiconductor material; and a gate contact region of conductive material. The functional region and the gate contact region extend on a top surface of the channel modulating region and the gate contact region is arranged laterally with respect to the functional region. The channel modulating region has a different conductivity type with respect to the functional region.

公开(公告)号：US20240304713A1

公开(公告)日：2024-09-12

申请号：US18591344

申请日：2024-02-29

Applicant: STMicroelectronics International N.V.

Inventor： Ferdinando IUCOLANO ,  Aurore CONSTANT ,  Cristina TRINGALI ,  Maria Eloisa CASTAGNA

IPC: H01L29/778 ,  H01L29/20 ,  H01L29/40 ,  H01L29/66

CPC classification number: H01L29/7786 ,  H01L29/2003 ,  H01L29/402 ,  H01L29/66462

Abstract: An HEMT device is formed on a semiconductor body having a semiconductive heterostructure. A control region of a semiconductor material, is arranged on the semiconductor body and has a top surface and lateral sides. A control terminal, of conductive material, extends on and in contact with the top surface of the control region. A passivation layer of non-conductive material, extends on the semiconductor body, partially on the top surface of the control region and on the lateral sides of the control region, laterally and at a distance from the control terminal.

公开(公告)号：US20240304711A1

公开(公告)日：2024-09-12

申请号：US18592816

申请日：2024-03-01

Applicant: STMicroelectronics International N.V.

Inventor： Cristina TRINGALI ,  Aurore CONSTANT ,  Maria Eloisa CASTAGNA ,  Ferdinando IUCOLANO

IPC: H01L29/778 ,  H01L29/20 ,  H01L29/423 ,  H01L29/66

CPC classification number: H01L29/778 ,  H01L29/2003 ,  H01L29/42316 ,  H01L29/66462

Abstract: A HEMT transistor is formed on a semiconductor body having a semiconductive heterostructure. A gate region of a semiconductor material, is arranged on the semiconductor body and has lateral sides. Sealing regions of non-conductive material extend on the lateral sides of the gate region; and a passivation layer of non-conductive material has surface portions extending on the semiconductor body, on both sides of the gate region and at a distance therefrom. The sealing regions and the passivation regions have different characteristic, such as are of different material or have different thicknesses.

公开(公告)号：US20240304710A1

公开(公告)日：2024-09-12

申请号：US18591541

申请日：2024-02-29

Applicant: STMicroelectronics International N.V.

Inventor： Cristina TRINGALI ,  Aurore CONSTANT ,  Maria Eloisa CASTAGNA ,  Ferdinando IUCOLANO

IPC: H01L29/778 ,  H01L29/06 ,  H01L29/40 ,  H01L29/66

CPC classification number: H01L29/778 ,  H01L29/0603 ,  H01L29/402 ,  H01L29/66431 ,  H01L29/66462

Abstract: A HEMT transistor has a body having a top surface and a heterostructure, and a gate region having a semiconductor material and arranged on the top surface of the body. The gate region has a first lateral sidewall and a second lateral sidewall opposite to the first lateral sidewall. The HEMT device further has a sealing layer of non-conductive material that extends on and in contact with the first and the second lateral sidewalls of the gate region; and a passivation layer of non-conductive material that has a surface portion. The surface portion extends on the top surface of the body, laterally to the first lateral sidewall of the gate region. The sealing layer and the passivation layer have different geometrical parameters and/or are of different material.