DISPLAY DEVICE AND MANUFACTURING METHOD THEREOF
    3.
    发明申请
    DISPLAY DEVICE AND MANUFACTURING METHOD THEREOF 有权
    显示装置及其制造方法

    公开(公告)号:US20150115257A1

    公开(公告)日:2015-04-30

    申请号:US14334525

    申请日:2014-07-17

    Abstract: A display device and a manufacturing method thereof with improved performance and low manufacturing complexity are provided. One inventive aspect includes: a first control electrode, a semiconductor layer, an etch stop layer, a first input electrode and a first output electrode, a third control electrode, a passivation layer and a pixel electrode. The third control electrode is formed on the etch stop layer. The passivation layer is formed on the first electrode, the first output electrode and the third control electrode. The pixel electrode is formed on the passivation layer and connects to the first output electrode.

    Abstract translation: 提供了具有改进的性能和低制造复杂度的显示装置及其制造方法。 本发明的一个方面包括:第一控制电极,半导体层,蚀刻停止层,第一输入电极和第一输出电极,第三控制电极,钝化层和像素电极。 第三控制电极形成在蚀刻停止层上。 钝化层形成在第一电极,第一输出电极和第三控制电极上。 像素电极形成在钝化层上并连接到第一输出电极。

    Thin film transistor, thin film transistor array panel, and manufacturing method of thin film transistor
    4.
    发明授权
    Thin film transistor, thin film transistor array panel, and manufacturing method of thin film transistor 有权
    薄膜晶体管,薄膜晶体管阵列面板以及薄膜晶体管的制造方法

    公开(公告)号:US09553201B2

    公开(公告)日:2017-01-24

    申请号:US14179452

    申请日:2014-02-12

    CPC classification number: H01L29/7869 H01L29/78696

    Abstract: The inventive concept relates to a thin film transistor and a thin film transistor array panel and, in detail, relates to a thin film transistor including an oxide semiconductor. A thin film transistor according to an exemplary embodiment of the inventive concept includes: a gate electrode; a gate insulating layer positioned on or under the gate electrode; a first semiconductor and a second semiconductor that overlap the gate electrode with the gate insulating layer interposed therebetween, the first semiconductor and the second semiconductor contacting each other; a source electrode connected to the second semiconductor; and a drain electrode connected to the second semiconductor and facing the source electrode, wherein the second semiconductor includes gallium (Ga) that is not included in the first semiconductor, and a content of gallium (Ga) in the second semiconductor is greater than 0 at. % and less than or equal to about 33 at. %.

    Abstract translation: 本发明构思涉及薄膜晶体管和薄膜晶体管阵列面板,并且详细地涉及包括氧化物半导体的薄膜晶体管。 根据本发明构思的示例性实施例的薄膜晶体管包括:栅电极; 位于栅极电极上或下方的栅极绝缘层; 第一半导体和第二半导体,其与栅电极重叠,栅极绝缘层插入其间,第一半导体和第二半导体彼此接触; 连接到所述第二半导体的源电极; 和连接到第二半导体并面向源电极的漏电极,其中第二半导体包括不包括在第一半导体中的镓(Ga),并且第二半导体中的镓(Ga)的含量大于0 。 %且小于或等于约33at。 %。

    Display device and manufacturing method thereof
    5.
    发明授权
    Display device and manufacturing method thereof 有权
    显示装置及其制造方法

    公开(公告)号:US09099360B2

    公开(公告)日:2015-08-04

    申请号:US14334525

    申请日:2014-07-17

    Abstract: A display device and a manufacturing method thereof with improved performance and low manufacturing complexity are provided. One inventive aspect includes: a first control electrode, a semiconductor layer, an etch stop layer, a first input electrode and a first output electrode, a third control electrode, a passivation layer and a pixel electrode. The third control electrode is formed on the etch stop layer. The passivation layer is formed on the first electrode, the first output electrode and the third control electrode. The pixel electrode is formed on the passivation layer and connects to the first output electrode.

    Abstract translation: 提供了具有改进的性能和低制造复杂度的显示装置及其制造方法。 本发明的一个方面包括:第一控制电极,半导体层,蚀刻停止层,第一输入电极和第一输出电极,第三控制电极,钝化层和像素电极。 第三控制电极形成在蚀刻停止层上。 钝化层形成在第一电极,第一输出电极和第三控制电极上。 像素电极形成在钝化层上并连接到第一输出电极。

    Display device
    6.
    发明授权

    公开(公告)号:US11569328B2

    公开(公告)日:2023-01-31

    申请号:US17223984

    申请日:2021-04-06

    Abstract: A display device includes a substrate, a corrosion prevention layer on the substrate and including an inorganic material, a first conductive layer on the corrosion prevention layer and including aluminum or an aluminum alloy, a first insulating film on the first conductive layer, a semiconductor layer on the first insulating film and including a channel region of a transistor, a second insulating film on the semiconductor layer, and a second conductive layer on the second insulating film and including a barrier layer, which includes titanium, and a main conductive layer, which includes aluminum or an aluminum alloy, wherein the semiconductor layer includes an oxide semiconductor, and the barrier layer is between the semiconductor layer and the main conductive layer and overlaps the channel region of the transistor.

    Thin film transistor and display device
    7.
    发明授权
    Thin film transistor and display device 有权
    薄膜晶体管和显示装置

    公开(公告)号:US09449990B2

    公开(公告)日:2016-09-20

    申请号:US14423838

    申请日:2013-08-30

    Abstract: Provided is a thin film transistor which is provided with an oxide semiconductor thin film layer and has a threshold voltage that does not change much due to light, a bias stress or the like, thereby exhibiting excellent stress stability. A thin film transistor of the present invention is provided with a gate electrode, an oxide semiconductor layer composed of a single layer which is used as a channel layer, an etch stopper layer to protect a surface of the oxide semiconductor layer, a source-drain electrode, and a gate insulator layer arranged between the gate electrode and the channel layer. The metal elements constituting the oxide semiconductor layer comprise In, Zn and Sn. The hydrogen concentration in the gate insulator layer in direct contact with the oxide semiconductor layer is controlled to 4 atomic % or lower.

    Abstract translation: 提供一种薄膜晶体管,其设置有氧化物半导体薄膜层,并且具有由于光,偏压应力等而不会变化太大的阈值电压,从而表现出优异的应力稳定性。 本发明的薄膜晶体管设置有栅电极,由用作沟道层的单层组成的氧化物半导体层,用于保护氧化物半导体层的表面的蚀刻停止层,源极 - 漏极 电极和布置在栅电极和沟道层之间的栅极绝缘体层。 构成氧化物半导体层的金属元素包括In,Zn和Sn。 与氧化物半导体层直接接触的栅极绝缘体层中的氢浓度被控制在4原子%以下。

    Thin film transistor
    8.
    发明授权
    Thin film transistor 有权
    薄膜晶体管

    公开(公告)号:US09324882B2

    公开(公告)日:2016-04-26

    申请号:US14721779

    申请日:2015-05-26

    Abstract: A thin film transistor containing at least, a gate electrode, a gate insulating film, an oxide semiconductor layer, source-drain electrode and a passivation film, in this order on a substrate. The oxide semiconductor layer is a laminate containing a first oxide semiconductor layer (IGZTO) and a second oxide semiconductor layer (IZTO). The second oxide semiconductor layer is formed on the gate insulating film, and the first oxide semiconductor layer is formed between the second oxide semiconductor layer and the passivation film. The contents of respective metal elements relative to the total amount of all the metal elements other than oxygen in the first oxide semiconductor layer are as follows; Ga: 8% or more and 30% or less; In: 25% or less, excluding 0%; Zn: 35% or more to 65% or less; and Sn: 5% or more to 30% or less.

    Abstract translation: 至少在基板上至少含有栅极,栅极绝缘膜,氧化物半导体层,源极 - 漏极和钝化膜的薄膜晶体管。 氧化物半导体层是含有第一氧化物半导体层(IGZTO)和第二氧化物半导体层(IZTO)的层压体。 第二氧化物半导体层形成在栅极绝缘膜上,第一氧化物半导体层形成在第二氧化物半导体层和钝化膜之间。 各金属元素相对于第一氧化物半导体层中除氧以外的全部金属元素的总量的含量如下: Ga:8%以上且30%以下; 在:25%以下,不含0%; Zn:35%以上65%以下; 和Sn:5%以上至30%以下。

    THIN FILM TRANSISTOR AND DISPLAY DEVICE
    9.
    发明申请
    THIN FILM TRANSISTOR AND DISPLAY DEVICE 有权
    薄膜晶体管和显示器件

    公开(公告)号:US20150228674A1

    公开(公告)日:2015-08-13

    申请号:US14423838

    申请日:2013-08-30

    Abstract: Provided is a thin film transistor which is provided with an oxide semiconductor thin film layer and has a threshold voltage that does not change much due to light, a bias stress or the like, thereby exhibiting excellent stress stability. A thin film transistor of the present invention is provided with a gate electrode, an oxide semiconductor layer composed of a single layer which is used as a channel layer, an etch stopper layer to protect a surface of the oxide semiconductor layer, a source-drain electrode, and a gate insulator layer arranged between the gate electrode and the channel layer. The metal elements constituting the oxide semiconductor layer comprise In, Zn and Sn. The hydrogen concentration in the gate insulator layer in direct contact with the oxide semiconductor layer is controlled to 4 atomic % or lower.

    Abstract translation: 提供一种薄膜晶体管,其设置有氧化物半导体薄膜层,并且具有由于光,偏压应力等而不会变化太大的阈值电压,从而表现出优异的应力稳定性。 本发明的薄膜晶体管设置有栅电极,由用作沟道层的单层组成的氧化物半导体层,用于保护氧化物半导体层的表面的蚀刻停止层,源极 - 漏极 电极和布置在栅电极和沟道层之间的栅极绝缘体层。 构成氧化物半导体层的金属元素包括In,Zn和Sn。 与氧化物半导体层直接接触的栅极绝缘体层中的氢浓度被控制在4原子%以下。

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