公开(公告)号：US20180350759A1

公开(公告)日：2018-12-06

申请号：US15971136

申请日：2018-05-04

Applicant: Renesas Electronics Corporation

Inventor： Yuki YAGYU

IPC: H01L23/00 ,  H01L21/56

CPC classification number: H01L24/03 ,  H01L21/56 ,  H01L21/78 ,  H01L23/3107 ,  H01L23/3128 ,  H01L24/05 ,  H01L24/83 ,  H01L24/85 ,  H01L2224/04042 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/48091 ,  H01L2224/48095 ,  H01L2224/48227 ,  H01L2224/48247 ,  H01L2224/48463 ,  H01L2224/73265 ,  H01L2224/85013 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/00012 ,  H01L2924/00014 ,  H01L2924/00

Abstract: The present invention: makes it possible to improve the reliability of a semiconductor device; and provides a method of manufacturing the semiconductor device comprising the steps of (a) providing a semiconductor wafer having a pad electrode, a first conductive layer comprised of copper, a photoresist film, and a second conductive layer comprised of gold, (b) forming a protective film comprised of iodine on the surface of the second conductive layer, (c) removing the photoresist film, (d) irradiating the protective film with argon ions and removing the protective film, and (e) bringing a part of a bonding wire into contact with the surface of the second conductive layer.

公开(公告)号：US20180082977A1

公开(公告)日：2018-03-22

申请号：US15640493

申请日：2017-07-01

Applicant: Renesas Electronics Corporation

Inventor： Yuki YAGYU

IPC: H01L23/00 ,  H01L23/495 ,  H01L23/31

CPC classification number: H01L24/85 ,  H01L23/3107 ,  H01L23/49513 ,  H01L23/49555 ,  H01L23/49558 ,  H01L23/49582 ,  H01L24/05 ,  H01L24/45 ,  H01L24/48 ,  H01L24/78 ,  H01L2224/05647 ,  H01L2224/32245 ,  H01L2224/45147 ,  H01L2224/45565 ,  H01L2224/45687 ,  H01L2224/48091 ,  H01L2224/48101 ,  H01L2224/48245 ,  H01L2224/48247 ,  H01L2224/48465 ,  H01L2224/7815 ,  H01L2224/78756 ,  H01L2224/8502 ,  H01L2224/85051 ,  H01L2224/85065 ,  H01L2224/85075 ,  H01L2224/85355 ,  H01L2224/85359 ,  H01L2224/85444 ,  H01L2224/85464 ,  H01L2224/85898 ,  H01L2224/85948 ,  H01L2224/85986 ,  H01L2224/92247 ,  H01L2924/0541 ,  H01L2924/181 ,  H01L2924/00012 ,  H01L2924/01012 ,  H01L2924/01013 ,  H01L2924/01022 ,  H01L2924/01025 ,  H01L2924/01026 ,  H01L2924/01028 ,  H01L2924/0103 ,  H01L2924/0104 ,  H01L2924/01041 ,  H01L2924/01042 ,  H01L2924/01044 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/01049 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01106 ,  H01L2924/01107 ,  H01L2224/45664 ,  H01L2924/00015

Abstract: Reliability of a semiconductor device is improved.A wire bonding step includes a step of exposing a wire and a pad electrode to a reducing gas atmosphere, forming a first hydroxyl layer on a surface of a ball portion, and forming a second hydroxyl layer on a surface of the pad electrode, a first bonding step of temporarily joining the ball portion to the pad electrode through the first hydroxyl layer and the second hydroxyl layer, and after the first bonding step, a step of actually joining the ball portion to the pad electrode by performing a heat treatment on a semiconductor chip and a base material.

公开(公告)号：US20180277511A1

公开(公告)日：2018-09-27

申请号：US15900919

申请日：2018-02-21

Applicant: Renesas Electronics Corporation

Inventor： Yuki YAGYU ,  Seiya ISOZAKI

IPC: H01L23/00 ,  H01L21/56

CPC classification number: H01L24/85 ,  H01L21/56 ,  H01L21/561 ,  H01L23/293 ,  H01L23/3128 ,  H01L24/05 ,  H01L24/48 ,  H01L27/11517 ,  H01L29/792 ,  H01L2224/023 ,  H01L2224/04042 ,  H01L2224/05084 ,  H01L2224/05147 ,  H01L2224/05155 ,  H01L2224/05164 ,  H01L2224/05166 ,  H01L2224/05171 ,  H01L2224/05644 ,  H01L2224/45147 ,  H01L2224/4845

Abstract: To provide a semiconductor device having improved reliability. A method of manufacturing the semiconductor device includes connecting a wire comprised of copper with a conductive layer formed on the pad electrode of a semiconductor chip, heat treating the semiconductor chip, and then sealing the semiconductor chip and the wire with a resin.

公开(公告)号：US20180182644A1

公开(公告)日：2018-06-28

申请号：US15829250

申请日：2017-12-01

Applicant: RENESAS ELECTRONICS CORPORATION

Inventor： Yuki YAGYU

IPC: H01L21/56 ,  H01L23/31 ,  H01L23/498 ,  H01L23/00 ,  B29C45/00 ,  B29C45/14

CPC classification number: H01L21/561 ,  B29C45/0046 ,  B29C45/14655 ,  B29C45/14836 ,  H01L21/56 ,  H01L21/565 ,  H01L23/3107 ,  H01L23/3128 ,  H01L23/49838 ,  H01L24/29 ,  H01L24/32 ,  H01L24/45 ,  H01L24/49 ,  H01L24/73 ,  H01L24/78 ,  H01L24/83 ,  H01L24/85 ,  H01L24/92 ,  H01L24/97 ,  H01L2224/04042 ,  H01L2224/05554 ,  H01L2224/29139 ,  H01L2224/29144 ,  H01L2224/32245 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/4809 ,  H01L2224/48247 ,  H01L2224/49051 ,  H01L2224/73265 ,  H01L2224/83805 ,  H01L2224/85203 ,  H01L2224/85205 ,  H01L2224/92247 ,  H01L2924/14 ,  H01L2924/00012 ,  H01L2924/0105

Abstract: A compact and high-reliability semiconductor device is implemented. The bonding wires situated in the vicinity of a gate, and the bonding wires situated in the vicinity of a vent facing to the gate across the center of a semiconductor chip in a molding step have a loop shape falling inwardly of the semiconductor chip, have a weaker pulling force (tension) than those of other bonding wires, and are loosely stretched with a margin. The bonding wires situated in the vicinity of the gate in the molding step are, for example, a first wire and a fifth wire to be connected with a first electrode pad and a fifth electrode pad, respectively. Whereas, the bonding wires situated in the vicinity of the vent in the molding step are, for example, a third wire and a seventh wire to be connected with a third electrode pad and a seventh electrode pad, respectively.

公开(公告)号：US20160197050A1

公开(公告)日：2016-07-07

申请号：US15071545

申请日：2016-03-16

Applicant: RENESAS ELECTRONICS CORPORATION

Inventor： Toshihiko AKIBA ,  Akihiro TOBITA ,  Yuki YAGYU

IPC: H01L23/00 ,  H01L21/66

CPC classification number: H01L24/05 ,  H01L21/4885 ,  H01L22/14 ,  H01L22/32 ,  H01L24/03 ,  H01L24/29 ,  H01L24/32 ,  H01L24/43 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L24/85 ,  H01L24/97 ,  H01L2224/02166 ,  H01L2224/0382 ,  H01L2224/03831 ,  H01L2224/04042 ,  H01L2224/05124 ,  H01L2224/05555 ,  H01L2224/05578 ,  H01L2224/05624 ,  H01L2224/05647 ,  H01L2224/05666 ,  H01L2224/05673 ,  H01L2224/05684 ,  H01L2224/16012 ,  H01L2224/2919 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/45124 ,  H01L2224/45139 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/48227 ,  H01L2224/48247 ,  H01L2224/48257 ,  H01L2224/48465 ,  H01L2224/49171 ,  H01L2224/73265 ,  H01L2224/8501 ,  H01L2224/85375 ,  H01L2224/97 ,  H01L2924/01022 ,  H01L2924/01029 ,  H01L2924/01074 ,  H01L2924/013 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/00012 ,  H01L2924/00014 ,  H01L2924/00 ,  H01L2924/00015

Abstract: A manufacturing method of a BGA, includes the steps of: providing a semiconductor chip having electrode pads; and removing a natural oxide film formed on the surface of each of the electrode pads. Further, a first film comprised of a conductive member is formed on the surface of the electrode pad exposed by removing the natural oxide film, a wire is connected with the first film, and part of the wire is brought into contact with the electrode pad to form an alloy layer at the interface between the wire and the electrode pad. The crystal structure of the first film is comprised of a body-centered cubic lattice or a hexagonal close-packed lattice. The cost of the semiconductor device can be reduced while the bonding reliability of wire bonding of the semiconductor device is ensured.

公开(公告)号：US20150333030A1

公开(公告)日：2015-11-19

申请号：US14711014

申请日：2015-05-13

Applicant: RENESAS ELECTRONICS CORPORATION

Inventor： Toshihiko AKIBA ,  Akihiro TOBITA ,  Yuki YAGYU

IPC: H01L23/00

CPC classification number: H01L24/05 ,  H01L21/4885 ,  H01L22/14 ,  H01L22/32 ,  H01L24/03 ,  H01L24/29 ,  H01L24/32 ,  H01L24/43 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L24/85 ,  H01L24/97 ,  H01L2224/02166 ,  H01L2224/0382 ,  H01L2224/03831 ,  H01L2224/04042 ,  H01L2224/05124 ,  H01L2224/05555 ,  H01L2224/05578 ,  H01L2224/05624 ,  H01L2224/05647 ,  H01L2224/05666 ,  H01L2224/05673 ,  H01L2224/05684 ,  H01L2224/16012 ,  H01L2224/2919 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/45124 ,  H01L2224/45139 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/48227 ,  H01L2224/48247 ,  H01L2224/48257 ,  H01L2224/48465 ,  H01L2224/49171 ,  H01L2224/73265 ,  H01L2224/8501 ,  H01L2224/85375 ,  H01L2224/97 ,  H01L2924/01022 ,  H01L2924/01029 ,  H01L2924/01074 ,  H01L2924/013 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/00012 ,  H01L2924/00014 ,  H01L2924/00 ,  H01L2924/00015

Abstract: A manufacturing method of a BGA, includes the steps of: providing a semiconductor chip having electrode pads; and removing a natural oxide film formed on the surface of each of the electrode pads. Further, a first film comprised of a conductive member is formed on the surface of the electrode pad exposed by removing the natural oxide film, a wire is connected with the first film, and part of the wire is brought into contact with the electrode pad to form an alloy layer at the interface between the wire and the electrode pad. The crystal structure of the first film is comprised of a body-centered cubic lattice or a hexagonal close-packed lattice. The cost of the semiconductor device can be reduced while the bonding reliability of wire bonding of the semiconductor device is ensured.

Abstract translation: 一种BGA的制造方法，包括以下步骤：提供具有电极焊盘的半导体芯片; 并除去形成在每个电极焊盘的表面上的自然氧化膜。 此外，在通过去除天然氧化物膜而暴露的电极焊盘的表面上形成由导电部件构成的第一膜，电线与第一膜连接，并且电线的一部分与电极焊盘接触， 在导线和电极焊盘之间的界面处形成合金层。 第一膜的晶体结构由体心立方晶格或六方密堆积晶格组成。 可以降低半导体器件的成本，同时确保半导体器件的引线接合的接合可靠性。