公开(公告)号：US20140004725A1

公开(公告)日：2014-01-02

申请号：US13674903

申请日：2012-11-12

Applicant: NOVATEK MICROELECTRONICS CORP.

Inventor： Jhih-Siou Cheng ,  Tzu-Chiang Lin ,  Chia-En Wu ,  Chun-Yung Cho ,  Cheng-Hung Chen ,  Ju-Lin Huang

IPC: H01R12/51

CPC classification number: H01L23/60 ,  H01L23/5389 ,  H01L24/17 ,  H01L25/0655 ,  H01L2224/16137 ,  H01L2224/16195 ,  H01L2924/0002 ,  H02H9/02 ,  H05K9/0067 ,  H01L2924/00

Abstract: A chip package structure includes a package body, a first lead and a second lead. Elements embedded inside the package body include a core circuit having at least one first connection terminal, at least one ESD protection circuit having at least one second connection terminal, at least one third connection terminal and at least one interconnection structure. The interconnection structure is electrically connected to the second connection terminal and the third connection terminal. The first lead on the package body is electrically connected to the second connection terminal and an external circuit. The second lead on the package body electrically connects the first connection terminal and the third connection terminal. The second lead and the first lead are separate in structure.

Abstract translation: 芯片封装结构包括封装体，第一引线和第二引线。 嵌入在封装体内的元件包括具有至少一个第一连接端子，至少一个ESD保护电路的至少一个第二连接端子，至少一个第三连接端子和至少一个互连结构的芯电路。 互连结构电连接到第二连接端子和第三连接端子。 封装主体上的第一引线电连接到第二连接端子和外部电路。 封装体上的第二引线电连接第一连接端子和第三连接端子。 第二个引线和第一个引线在结构上是分开的。

公开(公告)号：US20200220350A1

公开(公告)日：2020-07-09

申请号：US16821947

申请日：2020-03-17

Applicant: NOVATEK Microelectronics Corp.

Inventor： Jhih-Siou Cheng ,  Ju-Lin Huang ,  Chia-En Wu

IPC: H02H9/04 ,  H01L27/02

Abstract: The present invention provides an output circuit with electrostatic discharge (ESD) protection in a semiconductor chip of a source driver. The source driver is configured to drive a display panel. The output circuit includes an output buffer, an output pad, a switch and a first resistor. The switch is coupled between the output buffer and the output pad, wherein data voltages for driving the display panel are transmitted from the output buffer to the output pad via the switch. The switch includes a first metal oxide semiconductor (MOS) transistor, which includes a first terminal coupled to the output pad, a bulk terminal and a gate terminal. The first resistor is coupled between the bulk terminal of the first MOS transistor and a first power supply terminal.

公开(公告)号：US09514666B2

公开(公告)日：2016-12-06

申请号：US14645434

申请日：2015-03-12

Applicant: Novatek Microelectronics Corp.

Inventor： Ju-Lin Huang ,  Jhih-Siou Cheng ,  Chun-Yung Cho ,  Chia-En Wu

IPC: G09G5/00 ,  G09G3/20

CPC classification number: G09G3/20 ,  G09G2330/04 ,  G09G2330/06

Abstract: A display driving module including a driving circuit portion and a non-driving circuit portion is provided. The driving circuit portion is controlled by a system circuit block. The driving circuit portion includes driving channels for driving a display panel. First ESD protection devices are disposed in the driving circuit portion corresponding to the driving channels for providing at least one discharge path. The non-driving circuit portion electrically connects the system circuit block, the driving circuit portion and the display panel. At least one of second ESD protection devices is disposed in at least one of the driving circuit portion, the non-driving circuit portion, the system circuit block and the display panel corresponding to the first ESD protection devices. The second ESD protection devices cooperate with the first ESD protection devices to provide the discharge path. An image display system including the foregoing display driving module is also provided.

Abstract translation: 提供了包括驱动电路部分和非驱动电路部分的显示驱动模块。 驱动电路部分由系统电路块控制。 驱动电路部分包括用于驱动显示面板的驱动通道。 第一ESD保护装置设置在对应于驱动通道的驱动电路部分中，用于提供至少一个放电路径。 非驱动电路部分电连接系统电路块，驱动电路部分和显示面板。 至少一个第二ESD保护器件设置在驱动电路部分，非驱动电路部分，系统电路块和对应于第一ESD保护器件的显示面板中的至少一个中。 第二ESD保护装置与第一ESD保护装置配合以提供放电路径。 还提供了包括上述显示驱动模块的图像显示系统。

公开(公告)号：US20150262943A1

公开(公告)日：2015-09-17

申请号：US14726613

申请日：2015-06-01

Applicant: Novatek Microelectronics Corp.

Inventor： Jhih-Siou Cheng ,  Tzu-Chiang Lin ,  Chia-En Wu ,  Chun-Yung Cho ,  Cheng-Hung Chen ,  Ju-Lin Huang

IPC: H01L23/60 ,  H02H9/02 ,  H01L23/00 ,  H01L23/538 ,  H01L25/065

CPC classification number: H01L23/60 ,  H01L23/5389 ,  H01L24/17 ,  H01L25/0655 ,  H01L2224/16137 ,  H01L2224/16195 ,  H01L2924/0002 ,  H02H9/02 ,  H05K9/0067 ,  H01L2924/00

Abstract: A chip package structure includes a package body. The package body includes a core circuit and an electrostatic discharge protection circuit. A first connection terminal electrically is connected to the core circuit. A second connection terminal electrically is connected to the electrostatic discharge protection circuit. A first interconnection structure electrically connected to the electrostatic discharge protection circuit, the second connection terminal and a third connection terminal. A first lead electrically connects the second connection terminal and an external circuit. A second lead electrically connects the first connection terminal and the third connection terminal. The second lead and the first lead are substantially separate.

Abstract translation: 芯片封装结构包括封装体。 封装体包括核心电路和静电放电保护电路。 第一连接端子电连接到核心电路。 第二连接端子电连接到静电放电保护电路。 电连接到静电放电保护电路的第一互连结构，第二连接端子和第三连接端子。 第一引线将第二连接端子和外部电路电连接。 第二引线电连接第一连接端子和第三连接端子。 第二个领先者和第一个领先者基本上是分开的。

公开(公告)号：US09048243B2

公开(公告)日：2015-06-02

申请号：US13674903

申请日：2012-11-12

Applicant: Novatek Microelectronics Corp.

Inventor： Jhih-Siou Cheng ,  Tzu-Chiang Lin ,  Chia-En Wu ,  Chun-Yung Cho ,  Cheng-Hung Chen ,  Ju-Lin Huang

IPC: H01L23/12 ,  H01L23/48 ,  H01L23/52 ,  H01L29/40 ,  H01L23/538 ,  H01L23/60 ,  H05K9/00 ,  H01L25/065

CPC classification number: H01L23/60 ,  H01L23/5389 ,  H01L24/17 ,  H01L25/0655 ,  H01L2224/16137 ,  H01L2224/16195 ,  H01L2924/0002 ,  H02H9/02 ,  H05K9/0067 ,  H01L2924/00

Abstract: A chip package structure includes a package body, a first lead and a second lead. Elements embedded inside the package body include a core circuit having at least one first connection terminal, at least one ESD protection circuit having at least one second connection terminal, at least one third connection terminal and at least one interconnection structure. The interconnection structure is electrically connected to the second connection terminal and the third connection terminal. The first lead on the package body is electrically connected to the second connection terminal and an external circuit. The second lead on the package body electrically connects the first connection terminal and the third connection terminal. The second lead and the first lead are separate in structure.

Abstract translation: 芯片封装结构包括封装体，第一引线和第二引线。 嵌入在封装体内的元件包括具有至少一个第一连接端子，至少一个ESD保护电路的至少一个第二连接端子，至少一个第三连接端子和至少一个互连结构的芯电路。 互连结构电连接到第二连接端子和第三连接端子。 封装主体上的第一引线电连接到第二连接端子和外部电路。 封装体上的第二引线电连接第一连接端子和第三连接端子。 第二个引线和第一个引线在结构上是分开的。

公开(公告)号：US20170324240A1

公开(公告)日：2017-11-09

申请号：US15378067

申请日：2016-12-14

Applicant: NOVATEK Microelectronics Corp.

Inventor： Jhih-Siou Cheng ,  Ju-Lin Huang ,  Chia-En Wu

IPC: H02H9/04

CPC classification number: H02H9/046 ,  H01L27/0266 ,  H01L27/0288

Abstract: An output circuit with electrostatic discharge (ESD) protection in a semiconductor chip includes a first metal oxide semiconductor (MOS) transistor and a first resistor. The first MOS transistor includes a first terminal coupled to an output pad of the semiconductor chip, a bulk terminal and a gate terminal. The first resistor is coupled between the bulk terminal of the first MOS transistor and a first power supply terminal.

公开(公告)号：US20150339960A1

公开(公告)日：2015-11-26

申请号：US14645434

申请日：2015-03-12

Applicant: Novatek Microelectronics Corp.

Inventor： Ju-Lin Huang ,  Jhih-Siou Cheng ,  Chun-Yung Cho ,  Chia-En Wu

IPC: G09G3/00

CPC classification number: G09G3/20 ,  G09G2330/04 ,  G09G2330/06

Abstract: A display driving module including a driving circuit portion and a non-driving circuit portion is provided. The driving circuit portion is controlled by a system circuit block. The driving circuit portion includes driving channels for driving a display panel. First ESD protection devices are disposed in the driving circuit portion corresponding to the driving channels for providing at least one discharge path. The non-driving circuit portion electrically connects the system circuit block, the driving circuit portion and the display panel. At least one of second ESD protection devices is disposed in at least one of the driving circuit portion, the non-driving circuit portion, the system circuit block and the display panel corresponding to the first ESD protection devices. The second ESD protection devices cooperate with the first ESD protection devices to provide the discharge path. An image display system including the foregoing display driving module is also provided.

Abstract translation: 提供了包括驱动电路部分和非驱动电路部分的显示驱动模块。 驱动电路部分由系统电路块控制。 驱动电路部分包括用于驱动显示面板的驱动通道。 第一ESD保护装置设置在对应于驱动通道的驱动电路部分中，用于提供至少一个放电路径。 非驱动电路部分电连接系统电路块，驱动电路部分和显示面板。 至少一个第二ESD保护器件设置在驱动电路部分，非驱动电路部分，系统电路块和对应于第一ESD保护器件的显示面板中的至少一个中。 第二ESD保护装置与第一ESD保护装置配合以提供放电路径。 还提供了包括上述显示驱动模块的图像显示系统。

公开(公告)号：US11296500B2

公开(公告)日：2022-04-05

申请号：US16821947

申请日：2020-03-17

Applicant: NOVATEK Microelectronics Corp.

Inventor： Jhih-Siou Cheng ,  Ju-Lin Huang ,  Chia-En Wu

IPC: H02H9/04 ,  H01L27/02

Abstract: The present invention provides an output circuit with electrostatic discharge (ESD) protection in a semiconductor chip of a source driver. The source driver is configured to drive a display panel. The output circuit includes an output buffer, an output pad, a switch and a first resistor. The switch is coupled between the output buffer and the output pad, wherein data voltages for driving the display panel are transmitted from the output buffer to the output pad via the switch. The switch includes a first metal oxide semiconductor (MOS) transistor, which includes a first terminal coupled to the output pad, a bulk terminal and a gate terminal. The first resistor is coupled between the bulk terminal of the first MOS transistor and a first power supply terminal.

公开(公告)号：US09245857B2

公开(公告)日：2016-01-26

申请号：US14726613

申请日：2015-06-01

Applicant: Novatek Microelectronics Corp.

Inventor： Jhih-Siou Cheng ,  Tzu-Chiang Lin ,  Chia-En Wu ,  Chun-Yung Cho ,  Cheng-Hung Chen ,  Ju-Lin Huang

IPC: H01L23/12 ,  H01L23/48 ,  H01L23/52 ,  H01L23/40 ,  H01L23/60 ,  H01L23/538 ,  H01L25/065 ,  H01L23/00 ,  H02H9/02

CPC classification number: H01L23/60 ,  H01L23/5389 ,  H01L24/17 ,  H01L25/0655 ,  H01L2224/16137 ,  H01L2224/16195 ,  H01L2924/0002 ,  H02H9/02 ,  H05K9/0067 ,  H01L2924/00

Abstract: A chip package structure includes a package body. The package body includes a core circuit and an electrostatic discharge protection circuit. A first connection terminal electrically is connected to the core circuit. A second connection terminal electrically is connected to the electrostatic discharge protection circuit. A first interconnection structure electrically connected to the electrostatic discharge protection circuit, the second connection terminal and a third connection terminal. A first lead electrically connects the second connection terminal and an external circuit. A second lead electrically connects the first connection terminal and the third connection terminal. The second lead and the first lead are substantially separate.

Abstract translation: 芯片封装结构包括封装体。 封装体包括核心电路和静电放电保护电路。 第一连接端子电连接到核心电路。 第二连接端子电连接到静电放电保护电路。 电连接到静电放电保护电路的第一互连结构，第二连接端子和第三连接端子。 第一引线将第二连接端子和外部电路电连接。 第二引线电连接第一连接端子和第三连接端子。 第二个领先者和第一个领先者基本上是分开的。