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公开(公告)号：US20240223380A1
公开(公告)日：2024-07-04
申请号：US18069929
申请日：2022-12-21
Applicant: NXP B.V.
Inventor： Christine van Vredendaal , Joppe Willem Bos
CPC classification number: H04L9/3247 , H04L9/50
Abstract: Various embodiments relate to a data processing system comprising instructions embodied in a non-transitory computer readable medium, the instructions for digital signature method based in a processor, the instructions, including: performing p1/k iterations of a parallel chained hash function for a first signature calculation, wherein p1 is the total number of chained hashes to be calculated for the first signature and k is the number of parallel hashes performed by the parallel chained hash function; performing a parallel chained hash function on remaining remainder(p1/k) chained hashes from the first signature calculation and X=k−remainder(p1/k) chained hashes from a second signature calculation; and performing (p2−X)/k iterations of a parallel chained hash function for the second signature calculation, wherein p2 is the total number of chained hashes to be calculated for the second signature.
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公开(公告)号：US20240202273A1
公开(公告)日：2024-06-20
申请号：US18066862
申请日：2022-12-15
Applicant: NXP B.V.
Inventor： Björn FAY , Tobias SCHNEIDER , Joost Roland Renes , Melissa Azouaoui , Joppe Willem Bos
CPC classification number: G06F17/10 , G06F7/4812
Abstract: Various embodiments relate to a fault detection system and method for polynomial operations, including: selecting a plurality of evaluation points; evaluating a first polynomial at the plurality of evaluation points to produce first results; applying a first function to the first polynomial to produce a second polynomial; evaluating the second polynomial at the plurality of evaluation points second results; evaluating a second scalar function on the first results to produce third results; comparing the second results to the third results; and performing a polynomial operation using the second polynomial when the second results match the third results.
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公开(公告)号：US11502819B2
公开(公告)日：2022-11-15
申请号：US17154116
申请日：2021-01-21
Applicant: NXP B.V.
Inventor： Tobias Schneider , Joppe Willem Bos , Joost Roland Renes , Christine van Vredendaal
IPC: H04L9/00
Abstract: Various embodiments relate to a method and system for securely comparing a first and second polynomial, including: selecting a first subset of coefficients of the first polynomial and a second subset of corresponding coefficients of the second polynomial, wherein the coefficients of the first polynomial are split into shares and the first and second polynomials have coefficients; subtracting the second subset of coefficients from one of the shares of the first subset of coefficients; reducing the number of elements in the first subset of coefficients to elements by combining groups of / elements together; generating a random number for each of the elements of the reduced subset of coefficients; summing the product of each of the elements of the reduced subset of coefficients with their respective random numbers; summing the shares of the sum of the products; and generating an output indicating that the first polynomial does not equal the second polynomial when the sum does not equal zero.
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公开(公告)号：US11444767B1
公开(公告)日：2022-09-13
申请号：US17190986
申请日：2021-03-03
Applicant: NXP B.V.
Inventor： Joost Roland Renes , Joppe Willem Bos , Tobias Schneider , Christine van Vredendaal
Abstract: Various embodiments relate to a method for multiplying a first and a second polynomial in the ring [X]/(XN−1) to perform a cryptographic operation in a data processing system, the method for use in a processor of the data processing system, including: receiving the first polynomial and the second polynomial by the processor; mapping the first polynomial into a third polynomial in a first ring and a fourth polynomial in a second ring using a map; mapping the second polynomial into a fifth polynomial in the first ring and a sixth polynomial in the second ring using the map; multiplying the third polynomial in the first ring with the fifth polynomial in the first ring to produce a first multiplication result; multiplying the fourth polynomial in the second ring with the sixth polynomial in the second ring to produce a second multiplication result using Renes multiplication; and combining the first multiplication result and the second multiplication result using the map.
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公开(公告)号：US11409845B2
公开(公告)日：2022-08-09
申请号：US16250074
申请日：2019-01-17
Applicant: NXP B.V.
Inventor： Nikita Veshchikov , Joppe Willem Bos , Simon Johann Friedberger
Abstract: A method is provided for detecting copying of a machine learning model. A plurality of inputs is provided to a first machine learning model. The first machine learning model provides a plurality of output values. A sequence of bits of a master input is divided into a plurality of subsets of bits. The master input may be an image. Each subset of the plurality of subsets of bits corresponds to one of the plurality of output values. An ordered sequence of the inputs is generated based on the plurality of subsets of bits. The ordered sequence of the inputs is inputted to a second machine learning model. It is then determined if output values from the second machine learning model reproduces the predetermined master input. If the predetermined master input is reproduced, the second machine learning model is a copy of the first machine learning model.
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公开(公告)号：US10567159B2
公开(公告)日：2020-02-18
申请号：US15616648
申请日：2017-06-07
Applicant: NXP B.V.
Abstract: A method for mapping an input message to a message authentication code (MAC) by a white-box implementation of a keyed cryptographic operation in a cryptographic system that includes using a white-box implementation of the block cipher in a MAC.
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公开(公告)号：US09942038B2
公开(公告)日：2018-04-10
申请号：US14932622
申请日：2015-11-04
Applicant: NXP B.V.
Inventor： Joppe Willem Bos
CPC classification number: H04L9/3066 , G06F7/723 , G06F2207/7295 , H04L2209/34
Abstract: Various embodiments relate to a device for generating code which implements modular exponentiation, the device including: a memory used to store a lookup table; and a processor in communication with the memory, the processor configured to: receive information for a generated randomized addition chain; output code for implementing the modular exponentiation which loads elements from the lookup table including intermediate results which utilize the information for a generated randomized addition chain; and output code for implementing the modular exponentiation which uses the loaded elements to compute the next element.
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公开(公告)号：US20170373828A1
公开(公告)日：2017-12-28
申请号：US15194001
申请日：2016-06-27
Applicant: NXP B.V.
CPC classification number: H04L9/002 , G06F21/75 , H04L2209/16
Abstract: A method for performing a secure function in a data processing system is provided. In accordance with one embodiment, the method includes generating and encoding an encryption key. The encoded encryption key may be encrypted in a key store in a trusted execution environment (TEE) of the data processing system. The encrypted encryption key may encrypted, stored, and decrypted in the key store in the TEE, but used in a white-box implementation to perform a secure function. The secure function may include encrypting a value in the white-box implementation for securing a monetary value on, for example, a smart card. In one embodiment, each time an encryption key or decryption key is used, it is changed to a new key. The method makes code lifting and rollback attacks more difficult for an attacker because the key is stored separately from, for example, a white-box implementation in secure storage.
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公开(公告)号：US11847545B2
公开(公告)日：2023-12-19
申请号：US16564490
申请日：2019-09-09
Applicant: NXP B.V.
Inventor： Nikita Veshchikov , Joppe Willem Bos
IPC: G06N20/20 , G06N20/10 , G06F16/903 , G06N5/01
CPC classification number: G06N20/20 , G06F16/903 , G06N20/10 , G06N5/01
Abstract: A combination of machine learning models is provided, according to certain aspects, by a data-aggregation circuit, and a computer server. The data-aggregation circuit is used to assimilate respective sets of output data from at least one of a plurality of circuits to create a new data set, the respective sets of output data being related in that each set of output data is in response to a common data set processed by the machine learning circuitry in the at least one of the plurality of circuits. The computer server uses the new data set to train machine learning operations in at least one of the plurality of circuits.
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公开(公告)号：US20230353383A1
公开(公告)日：2023-11-02
申请号：US17733780
申请日：2022-04-29
Applicant: NXP B.V.
Inventor： Christine van Vredendaal , Joppe Willem Bos , Babette Anne Margaretha Lips , Joost Roland Renes
CPC classification number: H04L9/3247 , H04L9/14 , H04L9/0897
Abstract: Various embodiments relate to a data processing system comprising instructions embodied in a non-transitory computer readable medium, the instructions for signing messages using a plurality of one-time signing (OTS) keys and a binary-hash-tree structure having a height h and a plurality of nodes configured to provide a public key having, including: generating and storing an authentication path A[d:h−1] for a first 2d signatures corresponding to the first 2d OTS keys of the plurality of OTS keys, where d is the height of a sub-tree associated with first 2d OTS keys; initiating a signature counter; signing a first message using the first OTS key of the plurality of OTS keys; incrementing the signature counter; determining if 2d messages have been signed; signing a second message and incrementing the signature counter when 2d messages have not been signed; and updating authentication path A[d:h−1] for a second 2d signatures corresponding to the second 2d OTS keys of the plurality of OTS keys when 2d messages have been signed.
