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公开(公告)号：US20230341915A1
公开(公告)日：2023-10-26
申请号：US17729813
申请日：2022-04-26
Applicant: Micron Technology, Inc.
Inventor： Martin Brox , Thomas Hein , Wolfgang Anton Spirkl , Andrea Sorrentino , Peter Mayer
Abstract: Methods, systems, and devices for tracking a reference voltage (also referred to as VREFD) after boot-up are described. For example, a host device or a memory device may determine a temperature value associated with the memory device. The host device or the memory device may select a reference voltage offset value for the memory device based on mapping the temperature value associated with the memory device to a relationship between reference voltage offset values and temperature differential values associated with the memory device. The host device or the memory device may adjust a reference voltage value associated with the memory device based on the reference voltage offset value. The host device, or the memory device, may operate the memory device in accordance with the reference voltage value based on adjusting the reference voltage value.
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公开(公告)号：US20230019093A1
公开(公告)日：2023-01-19
申请号：US17375872
申请日：2021-07-14
Applicant: Micron Technology, Inc.
Inventor： Natalija Jovanovic , Andrea Sorrentino , Marcos Alvarez Gonzalez
IPC: G06F12/06
Abstract: Methods, systems, and devices for array access with receiver masking are described. A first device may issue to a second device a first sequence of write commands for a set of data. The first sequence of write commands may indicate different memory addresses in an order. After issuing the first sequence of write commands, the first device may issue to the second device a second sequence of read commands for the set of data. The second sequence of read commands may indicate the different memory addresses in the same order as the first sequence of write commands. Based on issuing the second sequence of read commands, the first device may receive the set of data from the second device.
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公开(公告)号：US12086005B2
公开(公告)日：2024-09-10
申请号：US17729813
申请日：2022-04-26
Applicant: Micron Technology, Inc.
Inventor： Martin Brox , Thomas Hein , Wolfgang Anton Spirkl , Andrea Sorrentino , Peter Mayer
Abstract: Methods, systems, and devices for tracking a reference voltage (also referred to as VREFD) after boot-up are described. For example, a host device or a memory device may determine a temperature value associated with the memory device. The host device or the memory device may select a reference voltage offset value for the memory device based on mapping the temperature value associated with the memory device to a relationship between reference voltage offset values and temperature differential values associated with the memory device. The host device or the memory device may adjust a reference voltage value associated with the memory device based on the reference voltage offset value. The host device, or the memory device, may operate the memory device in accordance with the reference voltage value based on adjusting the reference voltage value.
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公开(公告)号：US11907119B2
公开(公告)日：2024-02-20
申请号：US17375872
申请日：2021-07-14
Applicant: Micron Technology, Inc.
Inventor： Natalija Jovanovic , Andrea Sorrentino , Marcos Alvarez Gonzalez
CPC classification number: G06F12/0623 , G06F12/02 , G06F2212/251
Abstract: Methods, systems, and devices for array access with receiver masking are described. A first device may issue to a second device a first sequence of write commands for a set of data. The first sequence of write commands may indicate different memory addresses in an order. After issuing the first sequence of write commands, the first device may issue to the second device a second sequence of read commands for the set of data. The second sequence of read commands may indicate the different memory addresses in the same order as the first sequence of write commands. Based on issuing the second sequence of read commands, the first device may receive the set of data from the second device.
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公开(公告)号：US20250044826A1
公开(公告)日：2025-02-06
申请号：US18763965
申请日：2024-07-03
Applicant: Micron Technology, Inc.
Inventor： Marcos Alvarez Gonzalez , Andrea Sorrentino , Morshed Mohammed , Luiza Souza Correa , Wolfgang Anton Spirkl , Paritosh Piyush Sahu , Martin Bach , Ronny Schneider
IPC: G06F1/10
Abstract: Methods, systems, and devices for techniques for coupled host and memory dies are described. As part of a low-speed testing phase of a memory system, a low-speed tester may measure the change in phase of a set of clock signals in response to a change in a configuration of the memory system. For example, the low-speed tester may communicate with a mimic circuit of the memory system to determine a first frequency of a first clock signal of the multi-phase clock associated with a first configuration of the memory system and determine a second frequency of the first clock signal associated with a second configuration of the memory system. The low-speed tester may store an indication of the difference between the first frequency and the second frequency, and a high-speed tester may use the difference as part of selecting a set of trim parameters for the multi-phase clock signal.
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公开(公告)号：US20240160567A1
公开(公告)日：2024-05-16
申请号：US18419206
申请日：2024-01-22
Applicant: Micron Technology, Inc.
Inventor： Natalija Jovanovic , Andrea Sorrentino , Marcos Alvarez Gonzalez
CPC classification number: G06F12/0623 , G06F12/02 , G06F2212/251
Abstract: Methods, systems, and devices for array access with receiver masking are described. A first device may issue to a second device a first sequence of write commands for a set of data. The first sequence of write commands may indicate different memory addresses in an order. After issuing the first sequence of write commands, the first device may issue to the second device a second sequence of read commands for the set of data. The second sequence of read commands may indicate the different memory addresses in the same order as the first sequence of write commands Based on issuing the second sequence of read commands, the first device may receive the set of data from the second device.
