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公开(公告)号：US20120246395A1
公开(公告)日：2012-09-27
申请号：US13426259
申请日：2012-03-21
Applicant: Kyoung Lae Cho , Hong Rak Son , Eun Chu Oh
Inventor： Kyoung Lae Cho , Hong Rak Son , Eun Chu Oh
IPC: G06F12/00
CPC classification number: G06F12/0246 , G06F11/073 , G06F11/076 , G06F11/0793 , G06F12/0638
Abstract: Disclosed is a memory system which includes a nonvolatile memory device including a memory cell array having a plurality of word lines including a first set of word lines storing first data having a high bit error rate, and a second set of word lines storing second data having low bit error rate less than the high bit error rate, and a memory controller that during a program operation maps logical addresses for a portion of the first data and a portion of the second data onto a selected word line selected from the plurality of word lines.
Abstract translation: 公开了一种包括非易失性存储器件的存储器系统，该非易失性存储器件包括具有多个字线的存储单元阵列，该多个字线包括存储具有高误码率的第一数据的第一组字线和存储具有第二数据的第二数据的第二组， 低位错误率低于高位误码率;以及存储器控制器，其在编程操作期间将用于所述第一数据的一部分和所述第二数据的一部分的逻辑地址映射到从所述多个字线中选择的所选字线上 。
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2.发明授权Method for changing read parameter for improving read performance and apparatuses using the same 有权用于改变读取参数以提高读取性能的方法和使用其的装置
公开(公告)号：US09009390B2
公开(公告)日：2015-04-14
申请号：US13238749
申请日：2011-09-21
Applicant: Seong Hyeog Choi , Hong Rak Son , Kyoung Lae Cho , Jun Jin Kong , Sang Hoon Lee
Inventor： Seong Hyeog Choi , Hong Rak Son , Kyoung Lae Cho , Jun Jin Kong , Sang Hoon Lee
CPC classification number: G11C16/02 , G06F13/00 , G11C11/5642 , G11C16/00 , G11C16/06 , G11C16/3418 , G11C16/349 , G11C29/42
Abstract: A memory system including a non-volatile memory device and a memory controller is provided. When a read operation on a first data initially output from the non-volatile memory device during a first read operation is successful, the memory controller may change a read voltage for reading a second data stored in the non-volatile memory device during a second read operation.
Abstract translation: 提供了包括非易失性存储器件和存储器控制器的存储器系统。 当在第一次读取操作期间最初从非易失性存储器件输出的第一数据的读取操作成功时，存储器控制器可以在第二次读取期间改变用于读取存储在非易失性存储器件中的第二数据的读取电压 操作。
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公开(公告)号：US20110276857A1
公开(公告)日：2011-11-10
申请号：US13103460
申请日：2011-05-09
Applicant: Yong June Kim , Kyoung Lae Cho , Hong Rak Son
Inventor： Yong June Kim , Kyoung Lae Cho , Hong Rak Son
CPC classification number: G06F11/1048 , G11C29/10 , G11C2029/0411 , H03M7/46
Abstract: A data storage device includes a non-volatile memory device including a plurality of memory cells and a memory controller. The memory controller is configured to modify an arrangement of program data and to program the modified program data into the plurality of memory cells. The memory controller modifies the program data to eliminate a given data pattern causing physical interference between adjacent memory cells from the modified program data.
Abstract translation: 数据存储装置包括包括多个存储器单元和存储器控制器的非易失性存储器件。 存储器控制器被配置为修改程序数据的布置并且将修改的程序数据编程到多个存储器单元中。 存储器控制器修改程序数据以消除给定的数据模式，从修改的程序数据导致相邻存储器单元之间的物理干扰。
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公开(公告)号：US20100020620A1
公开(公告)日：2010-01-28
申请号：US12453964
申请日：2009-05-28
Applicant: Yong June Kim , Kyoung Lae Cho , Jae Hong Kim , Jun Jin Kong , Hong Rak Son
Inventor： Yong June Kim , Kyoung Lae Cho , Jae Hong Kim , Jun Jin Kong , Hong Rak Son
CPC classification number: G11C11/5628 , G11C7/1006
Abstract: Example embodiments may provide a memory device and memory data programming method. The memory device according to example embodiments may encode a first data page to generate at least one first codeword and encode a second data page to generate a second codeword. The memory device may generate the first codeword with at least one of a maximum value of a number of successive ones and a second maximum value of a number of successive zeros. The memory device may program the at least one first codeword and the at least one second codeword to a plurality of multi-bit cells.
Abstract translation: 示例性实施例可以提供存储器设备和存储器数据编程方法。 根据示例性实施例的存储器件可编码第一数据页以产生至少一个第一码字，并对第二数据页进行编码以产生第二码字。 存储器装置可以利用连续零个数的最大值和连续零数的第二最大值中的至少一个来生成第一码字。 存储器件可以将至少一个第一代码字和至少一个第二代码字编程到多个多位单元。
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5.发明授权Data storage device and program method that modifies arrangement of program data to eliminate interfering data patterns 有权数据存储装置和程序方法，其修改程序数据的排列以消除干扰数据模式
公开(公告)号：US08782490B2
公开(公告)日：2014-07-15
申请号：US13103460
申请日：2011-05-09
Applicant: Yong June Kim , Kyoung Lae Cho , Hong Rak Son
Inventor： Yong June Kim , Kyoung Lae Cho , Hong Rak Son
CPC classification number: G06F11/1048 , G11C29/10 , G11C2029/0411 , H03M7/46
Abstract: A data storage device includes a non-volatile memory device including a plurality of memory cells and a memory controller. The memory controller is configured to modify an arrangement of program data and to program the modified program data into the plurality of memory cells. The memory controller modifies the program data to eliminate a given data pattern causing physical interference between adjacent memory cells from the modified program data.
Abstract translation: 数据存储装置包括包括多个存储器单元和存储器控制器的非易失性存储器件。 存储器控制器被配置为修改程序数据的布置并且将修改的程序数据编程到多个存储器单元中。 存储器控制器修改程序数据以消除给定的数据模式，从修改的程序数据导致相邻存储器单元之间的物理干扰。
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6.发明授权Method, device and system for storing data in storage media using a reference condition 有权使用参考条件在存储介质中存储数据的方法，设备和系统
公开(公告)号：US08738838B2
公开(公告)日：2014-05-27
申请号：US13082190
申请日：2011-04-07
Applicant: Kyoung Lae Cho , Chanho Yoon , JunJin Kong , Hee Chang Cho , Bumseok Yu , Hong Rak Son
Inventor： Kyoung Lae Cho , Chanho Yoon , JunJin Kong , Hee Chang Cho , Bumseok Yu , Hong Rak Son
CPC classification number: H03M7/30 , G11C16/349
Abstract: A method of storing data in a storage media can include determining whether a size of data to be stored in the storage media satisfies a reference condition and compressing the data to provide compressed data for storage in the storage media upon determining that the size satisfies a reference condition.
Abstract translation: 在存储介质中存储数据的方法可以包括确定要存储在存储介质中的数据的大小是否满足参考条件，并且在确定尺寸满足参考值时，压缩数据以提供用于存储在存储介质中的压缩数据 条件。
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公开(公告)号：US08004891B2
公开(公告)日：2011-08-23
申请号：US12453964
申请日：2009-05-28
Applicant: Yong June Kim , Kyoung Lae Cho , Jae Hong Kim , Jun Jin Kong , Hong Rak Son
Inventor： Yong June Kim , Kyoung Lae Cho , Jae Hong Kim , Jun Jin Kong , Hong Rak Son
IPC: G11C16/04
CPC classification number: G11C11/5628 , G11C7/1006
Abstract: Example embodiments may provide a memory device and memory data programming method. The memory device according to example embodiments may encode a first data page to generate at least one first codeword and encode a second data page to generate a second codeword. The memory device may generate the first codeword with at least one of a maximum value of a number of successive ones and a second maximum value of a number of successive zeros. The memory device may program the at least one first codeword and the at least one second codeword to a plurality of multi-bit cells.
Abstract translation: 示例性实施例可以提供存储器设备和存储器数据编程方法。 根据示例性实施例的存储器件可编码第一数据页以产生至少一个第一码字，并对第二数据页进行编码以产生第二码字。 存储器装置可以利用连续零个数的最大值和连续零数的第二最大值中的至少一个来生成第一码字。 存储器件可以将至少一个第一代码字和至少一个第二代码字编程到多个多位单元。
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8.发明授权Data storage device and method performing background operation with selected data compression 有权数据存储设备和方法通过选择的数据压缩执行后台操作
公开(公告)号：US08706953B2
公开(公告)日：2014-04-22
申请号：US13096036
申请日：2011-04-28
Applicant: Kyoung Lae Cho , Kwang Ho Kim , Jun Jin Kong , Jaehong Kim , Hong Rak Son
Inventor： Kyoung Lae Cho , Kwang Ho Kim , Jun Jin Kong , Jaehong Kim , Hong Rak Son
IPC: G06F12/02
CPC classification number: H03M7/30
Abstract: A method of storing data in a storage medium of a data storage device comprises storing input data in the storage medium, and reading the input data from the storage medium and compressing the read data during a background operation of the data storage device.
Abstract translation: 一种在数据存储装置的存储介质中存储数据的方法包括将输入数据存储在存储介质中，并从存储介质读取输入数据，并在数据存储装置的后台操作期间压缩读取的数据。
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9.发明申请Data Storage Devices and Data Management Methods for Processing Mapping Tables 审中-公开用于处理映射表的数据存储设备和数据管理方法
公开(公告)号：US20110320689A1
公开(公告)日：2011-12-29
申请号：US13159075
申请日：2011-06-13
Applicant: Kyoung Lae Cho , Jun-jin Kong , Hong-rak Son , Seong-hyeong Choi
Inventor： Kyoung Lae Cho , Jun-jin Kong , Hong-rak Son , Seong-hyeong Choi
CPC classification number: G06F12/0246 , G06F2212/7201
Abstract: Methods of operating integrated circuit devices include updating a mapping table with physical address information by reading forward link information from a plurality of spare sectors in a corresponding plurality of pages within a nonvolatile memory device and then writing mapping table information derived from the forward link information into the mapping table. This forward link information may be configured as absolute address information (e.g., next physical address) and/or relative address information (e.g., change in physical address). This updating of the mapping table may include updating a mapping table within a volatile memory, in response to a resumption of power within the integrated circuit device. This resumption of power may follow a power failure during which the contents of the volatile memory are lost.
Abstract translation: 操作集成电路设备的方法包括：通过从非易失性存储器件内的相应多个页面中的多个备用扇区读取前向链路信息，然后将从前向链路信息导出的映射表信息写入到 映射表。 该前向链路信息可以被配置为绝对地址信息（例如，下一个物理地址）和/或相对地址信息（例如，物理地址的改变）。 映射表的这种更新可以包括响应于集成电路设备内的恢复功率而更新易失性存储器内的映射表。 这种恢复电源可能会在易失性存储器的内容丢失的情况下发生电源故障。
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10.发明授权Memory device and method of managing memory data error including determining verification voltages and changing threshold voltages based on a corrected error bit 有权存储器件和管理存储器数据错误的方法，包括基于校正的误差位确定验证电压和改变阈值电压
公开(公告)号：US08972775B2
公开(公告)日：2015-03-03
申请号：US12453163
申请日：2009-04-30
Applicant: Yong June Kim , Jae Hong Kim , Jun Jin Kong , Kyoung Lae Cho
Inventor： Yong June Kim , Jae Hong Kim , Jun Jin Kong , Kyoung Lae Cho
CPC classification number: G11C16/10 , G06F11/1072 , G11C11/5628 , G11C11/5642 , G11C16/3454 , G11C29/00 , G11C2211/5621 , G11C2211/5634
Abstract: Memory devices and/or methods of managing memory data errors are provided. A memory device detects and corrects an error bit of data read from a plurality of memory cells, and identifies a memory cell storing the detected error bit. The memory device assigns a verification voltage to each of the plurality of first memory cells, the assigned verification voltage corresponding to the corrected bit for the identified memory cell, the assigned verification voltage corresponding to the read data for the remaining memory cells. The memory device readjusts the data stored in the plurality of memory cells using the assigned verification voltage. Through this, it is possible to increase a retention period of the data of the memory device.
Abstract translation: 提供了存储器件和/或管理存储器数据错误的方法。 存储器件检测并校正从多个存储器单元读取的数据的错误位，并且识别存储检测到的错误位的存储单元。 存储装置向多个第一存储器单元中的每一个分配验证电压，对应于所识别的存储单元的校正位的分配的验证电压，对应于剩余存储单元的读取数据的分配验证电压。 存储装置使用分配的验证电压重新调整存储在多个存储单元中的数据。 由此，可以增加存储装置的数据的保持期。
