公开(公告)号：US20170181275A1

公开(公告)日：2017-06-22

申请号：US14975162

申请日：2015-12-18

Applicant: Intel Corporation

Inventor： Rajendra C. Dias ,  Manish Dubey ,  Tatyana N. Andryushchenko ,  Aleksandar Aleksov ,  David W. Staines

IPC: H05K1/02 ,  H05K1/11 ,  A43B3/00 ,  H05K3/32 ,  A41D1/00 ,  H05K1/18 ,  H05K1/03

CPC classification number: H05K1/0283 ,  A41D1/002 ,  A43B3/0005 ,  H01L2224/16225 ,  H05K1/0313 ,  H05K1/0393 ,  H05K1/111 ,  H05K1/186 ,  H05K3/32

Abstract: In accordance with disclosed embodiments, there are provided methods, systems, and apparatuses for gradient encapsulant protection of devices in stretchable electronic. For instance, in accordance with one embodiment, there is an apparatus with an electrical device on a stretchable substrate; one or more stretchable electrical interconnects coupled with the electrical device; one or more electrical components electrically coupled with the electrical device via the one or more stretchable electrical interconnects; and a gradient encapsulating material layered over and fully surrounding the electrical device and at least a portion of the one or more stretchable electrical interconnects coupled thereto, in which the gradient encapsulating material has an elastic modulus greater than the stretchable substrate and in which the elastic modulus of the gradient encapsulating material is less than the electrical device. Other related embodiments are disclosed.

公开(公告)号：US10206277B2

公开(公告)日：2019-02-12

申请号：US14975162

申请日：2015-12-18

Applicant: Intel Corporation

Inventor： Rajendra C. Dias ,  Manish Dubey ,  Tatyana N. Andryushchenko ,  Aleksandar Aleksov ,  David W. Staines

IPC: H05K1/00 ,  H05K1/02 ,  A41D1/00 ,  A43B3/00 ,  H05K1/03 ,  H05K1/11 ,  H05K1/18 ,  H05K3/32

Abstract: In accordance with disclosed embodiments, there are provided methods, systems, and apparatuses for gradient encapsulant protection of devices in stretchable electronic. For instance, in accordance with one embodiment, there is an apparatus with an electrical device on a stretchable substrate; one or more stretchable electrical interconnects coupled with the electrical device; one or more electrical components electrically coupled with the electrical device via the one or more stretchable electrical interconnects; and a gradient encapsulating material layered over and fully surrounding the electrical device and at least a portion of the one or more stretchable electrical interconnects coupled thereto, in which the gradient encapsulating material has an elastic modulus greater than the stretchable substrate and in which the elastic modulus of the gradient encapsulating material is less than the electrical device. Other related embodiments are disclosed.

公开(公告)号：US10468357B2

公开(公告)日：2019-11-05

申请号：US15546958

申请日：2015-03-11

Applicant: Intel Corporation

Inventor： Rajendra C. Dias ,  Tatyana N. Andryushchenko ,  Mauro J. Kobrinsky ,  Aleksandar Aleksov ,  David W. Staines

IPC: H01L23/498 ,  H01L23/00 ,  H01L23/16 ,  H01L21/48 ,  H01L21/56 ,  H01L23/31

Abstract: Embodiments of the invention include a microelectronic device and methods for forming a microelectronic device. In an embodiment, the microelectronic device includes a semiconductor die that has one or more die contacts that are each electrically coupled to a contact pad by a conductive trace. The semiconductor die may have a first elastic modulus. The microelectronic device may also include an encapsulation layer over the semiconductor die and the conductive trace. The encapsulation layer may have a second elastic modulus that is less than the first elastic modulus. The microelectronic device may also include a first strain redistribution layer within the encapsulation layer. The first strain redistribution layer may have a footprint that covers the semiconductor die and a portion of the conductive traces. The strain redistribution layer may have a third elastic modulus that is less than the first elastic modulus and greater than the second elastic modulus.