公开(公告)号：US20200294969A1

公开(公告)日：2020-09-17

申请号：US16355623

申请日：2019-03-15

Applicant: Intel Corporation

Inventor： Willy Rachmady ,  Cheng-Ying Huang ,  Ehren Mannebach ,  Anh Phan ,  Caleb Shuan Chia Barrett ,  Jay Prakash Gupta ,  Nishant Gupta ,  Kaiwen Hsu ,  Byungki Jung ,  Srinivasa Aravind Killampalli ,  Justin Gary Railsback ,  Supanee Sukrittanon ,  Prashant Wadhwa

IPC: H01L25/065 ,  H01L27/085 ,  H01L29/78 ,  H01L21/84 ,  H01L27/06

Abstract: Disclosed herein are stacked transistors with dielectric between source/drain materials of different strata, as well as related methods and devices. In some embodiments, an integrated circuit structure may include stacked strata of transistors, wherein a dielectric material is between source/drain materials of adjacent strata, and the dielectric material is conformal on underlying source/drain material.