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公开(公告)号:US20170161106A1
公开(公告)日:2017-06-08
申请号:US15385823
申请日:2016-12-20
Applicant: Intel Corporation
Inventor: Morris Marden , Matthew Merten , Alexandre Farcy , Avinash Sodani , James Hadley , Ilhyun Kim
CPC classification number: G06F9/50 , G06F9/30101 , G06F9/3851 , G06F2209/5014
Abstract: A method and apparatus for providing fairness in a multi-processing element environment is herein described. Mask elements are utilized to associated portions of a reservation station with each processing element, while still allowing common access to another portion of reservation station entries. Additionally, bias logic biases selection of processing elements in a pipeline away from a processing element associated with a blocking stall to provide fair utilization of the pipeline.
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公开(公告)号:US10409612B2
公开(公告)日:2019-09-10
申请号:US14998249
申请日:2015-12-26
Applicant: Intel Corporation
Inventor: Martin G. Dixon , Ravi Rajwar , Konrad K. Lai , Robert S. Chappell , Rajesh S. Parthasarathy , Alexandre J. Farcy , Ilhyun Kim , Prakash Math , Matthew Merten , Vijaykumar Kadgi
IPC: G06F9/30 , G06F9/38 , G06F12/0875 , G06F12/0897 , G06F13/16 , G06F13/40 , G06F12/084 , G06F12/0895 , G06F13/42 , G06F12/0831 , G06F9/52 , G06F12/0811 , G06F12/0862 , G06F12/1027 , G06F9/46 , G06F12/0815 , G06F12/1045 , G06F12/0806
Abstract: An apparatus and method is described herein for providing robust speculative code section abort control mechanisms. Hardware is able to track speculative code region abort events, conditions, and/or scenarios, such as an explicit abort instruction, a data conflict, a speculative timer expiration, a disallowed instruction attribute or type, etc. And hardware, firmware, software, or a combination thereof makes an abort determination based on the tracked abort events. As an example, hardware may make an initial abort determination based on one or more predefined events or choose to pass the event information up to a firmware or software handler to make such an abort determination. Upon determining an abort of a speculative code region is to be performed, hardware, firmware, software, or a combination thereof performs the abort, which may include following a fallback path specified by hardware or software. And to enable testing of such a fallback path, in one implementation, hardware provides software a mechanism to always abort speculative code regions.
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公开(公告)号:US10409611B2
公开(公告)日:2019-09-10
申请号:US14998248
申请日:2015-12-26
Applicant: Intel Corporation
Inventor: Martin G. Dixon , Ravi Rajwar , Konrad K. Lai , Robert S. Chappell , Rajesh S. Parthasarathy , Alexandre J. Farcy , Ilhyun Kim , Prakash Math , Matthew Merten , Vijaykumar Kadgi
IPC: G06F9/30 , G06F9/38 , G06F12/0875 , G06F12/0897 , G06F13/16 , G06F13/40 , G06F12/084 , G06F12/0895 , G06F13/42 , G06F12/0831 , G06F9/52 , G06F12/0811 , G06F12/0862 , G06F12/1027 , G06F9/46 , G06F12/0815 , G06F12/1045 , G06F12/0806
Abstract: An apparatus and method is described herein for providing robust speculative code section abort control mechanisms. Hardware is able to track speculative code region abort events, conditions, and/or scenarios, such as an explicit abort instruction, a data conflict, a speculative timer expiration, a disallowed instruction attribute or type, etc. And hardware, firmware, software, or a combination thereof makes an abort determination based on the tracked abort events. As an example, hardware may make an initial abort determination based on one or more predefined events or choose to pass the event information up to a firmware or software handler to make such an abort determination. Upon determining an abort of a speculative code region is to be performed, hardware, firmware, software, or a combination thereof performs the abort, which may include following a fallback path specified by hardware or software. And to enable testing of such a fallback path, in one implementation, hardware provides software a mechanism to always abort speculative code regions.
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