公开(公告)号：US20230335621A1

公开(公告)日：2023-10-19

申请号：US18299245

申请日：2023-04-12

Applicant: Hangzhou Silicon-Magic Semiconductor Technology Co., Ltd.

Inventor： Jiakun Wang ,  Zhaoming Yao

IPC: H01L29/66 ,  H01L29/40 ,  H01L29/78

CPC classification number: H01L29/66734 ,  H01L29/407 ,  H01L29/7813 ,  H01L29/401

Abstract: Disclosed is a method for manufacturing a trench-type MOSFET, which comprises: providing a semiconductor structure, forming a trench in the semiconductor structure; forming a side oxide layer and dielectric layer in the trench; forming a shielding conductor in the trench; removing the hard mask; performing wet etching to remove the side oxide layer and dielectric layer; depositing an oxide layer from above the trench; etching the oxide layer to make an upper surface of the oxide layer lower than that of the shielding conductor; forming a gate dielectric layer and a gate conductor on the oxide layer, wherein the gate dielectric layer is located on an upper-portion side wall of the trench and separates the gate conductor from the semiconductor structure. By improving gate poly morphology, figure of merit of the device is optimized.