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公开(公告)号：US20060070715A1
公开(公告)日：2006-04-06
申请号：US10956477
申请日：2004-10-01
Applicant: Charles Connors , Shirish Shah
Inventor： Charles Connors , Shirish Shah
IPC: B22D11/06
Abstract: A method of casting a refractory article. The method includes providing a mold formed from a slurry composition comprising plaster and fibers and adding a refractory composition to the mold. The method also includes allowing the refractory composition to set. The refractory composition comprises colloidal silica.
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公开(公告)号：US20090266403A1
公开(公告)日：2009-10-29
申请号：US12429912
申请日：2009-04-24
Applicant: Shirish Shah , Abhay Maheshwari , Kevin R. Gibson
Inventor： Shirish Shah , Abhay Maheshwari , Kevin R. Gibson
IPC: H01L31/052 , H01L31/042 , H01L21/50
CPC classification number: H01L31/022425 , H01L31/18 , Y02E10/50
Abstract: A method of forming a solar device. The method includes providing one or more photovoltaic cells having a front surface region and a back surface region. The method includes providing a first conductor element having a first side operably coupled to a first region of the front surface region of the one or more photovoltaic cells and a second side. In a specific embodiment, the conductor element includes a first anisotropic conducting tape material or a first conducting tape material, the first conducting element having a first thickness, a first length, and a first width. The method performs a bonding process to cause the first conductor element to conduct electric current in a first selected direction.
Abstract translation: 一种形成太阳能装置的方法。 该方法包括提供具有前表面区域和后表面区域的一个或多个光伏电池。 该方法包括提供第一导体元件，其具有可操作地耦合到一个或多个光伏电池的前表面区域的第一区域和第二侧面的第一侧面。 在具体实施例中，导体元件包括第一各向异性导电带材料或第一导电带材料，第一导电元件具有第一厚度，第一长度和第一宽度。 该方法进行接合处理，以使第一导体元件沿第一选定方向导通电流。
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公开(公告)号：US07500511B2
公开(公告)日：2009-03-10
申请号：US10671423
申请日：2003-09-24
Applicant: George Connors , Shirish Shah
Inventor： George Connors , Shirish Shah
Abstract: A slurry composition for a mold and method of use thereof. The slurry composition includes about 45-80% by weight alumina, about 10-30% by weight silicon carbide, and about 10-50% by weight colloidal silica. In one aspect, the alumina component comprises a material selected from the group consisting of brown fused alumina, white fused alumina, tabular alumina, calcined alumina, and mixtures thereof. In another aspect, the composition includes fumed silica at 2-5% by weight. The composition may also include a setting agent at 0.05-2% by weight.
Abstract translation: 一种用于模具的浆料组合物及其使用方法。 浆料组合物包含约45-80重量％的氧化铝，约10-30重量％的碳化硅和约10-50重量％的胶体二氧化硅。 一方面，氧化铝组分包括选自棕色熔融氧化铝，白色熔融氧化铝，片状氧化铝，煅烧氧化铝及其混合物的材料。 在另一方面，组合物包括2-5重量％的煅制二氧化硅。 组合物还可以包含0.05-2重量％的固化剂。
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4.发明授权Method of balanced coefficient of thermal expansion for flip chip ball grid array 有权倒装芯片球栅阵列的平衡热膨胀系数方法
公开(公告)号：US06806119B2
公开(公告)日：2004-10-19
申请号：US10631328
申请日：2003-07-30
Applicant: Kumar Nagarajan , Zafer Kutlu , Shirish Shah
Inventor： Kumar Nagarajan , Zafer Kutlu , Shirish Shah
IPC: H01L2144
CPC classification number: H01L21/563 , H01L23/3114 , H01L23/3128 , H01L24/29 , H01L24/83 , H01L2224/05568 , H01L2224/05569 , H01L2224/05573 , H01L2224/13025 , H01L2224/16225 , H01L2224/16237 , H01L2224/32225 , H01L2224/73203 , H01L2224/73204 , H01L2224/73253 , H01L2224/83192 , H01L2224/83194 , H01L2924/00014 , H01L2924/01013 , H01L2924/01033 , H01L2924/01322 , H01L2924/14 , H01L2924/15311 , H01L2924/16195 , H01L2924/00 , H01L2924/3512 , H01L2924/00012 , H01L2224/05599 , H01L2224/05099
Abstract: A flip chip ball grid array package includes a thin die having a die thickness reduced from a wafer thickness to reduce mismatch of a coefficient of thermal expansion between the thin die and a substrate; a plurality of thin film layers formed on the thin die wherein each of the plurality of thin film layers has a coefficient of thermal expansion that is greater than that of the thin die and is less than that of the substrate; and a plurality of wafer bumps formed on the thin die for making electrical contact between the thin die and the substrate.
Abstract translation: 倒装芯片球栅阵列封装包括具有从晶片厚度减小的管芯厚度的薄管芯，以减少薄管芯和基板之间的热膨胀系数的失配; 多个薄膜层，其形成在所述薄模上，其中所述多个薄膜层中的每一个具有大于所述薄模的热膨胀系数，并且小于所述基板的热膨胀系数; 以及形成在薄模上的多个晶片凸块，用于在薄模和基板之间进行电接触。
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公开(公告)号：US08505335B2
公开(公告)日：2013-08-13
申请号：US11820389
申请日：2007-06-19
Applicant: Charles W. Connors, Sr. , Michael W. Anderson , Shirish Shah
Inventor： Charles W. Connors, Sr. , Michael W. Anderson , Shirish Shah
IPC: C03B5/43
CPC classification number: C04B35/6316 , C03B5/42 , C04B35/106 , C04B35/482 , C04B35/62665 , C04B35/66 , C04B2235/3206 , C04B2235/3217 , C04B2235/3218 , C04B2235/3244 , C04B2235/3248 , C04B2235/3418 , C04B2235/3463 , C04B2235/402 , C04B2235/5427 , C04B2235/5436
Abstract: A refractory system includes a first set of components and a colloidal silica binder. The first set of components includes alumina and zirconia. The colloidal silica binder is at 5 wt % to 20 wt % of the dry weight of the first set of components. The refractory composition comprises 10 wt % to 45 wt % alumina, at least 35 wt % zirconia, and at least 20 wt % silica.
Abstract translation: 耐火系统包括第一组成分和胶体二氧化硅粘合剂。 第一组成分包括氧化铝和氧化锆。 胶体二氧化硅粘合剂为第一组成分的干重的5重量％至20重量％。 耐火材料组合物包含10重量％至45重量％的氧化铝，至少35重量％的氧化锆和至少20重量％的二氧化硅。
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公开(公告)号：US07562694B2
公开(公告)日：2009-07-21
申请号：US10956477
申请日：2004-10-01
Applicant: Charles W. Connors, Jr. , Shirish Shah
Inventor： Charles W. Connors, Jr. , Shirish Shah
Abstract: A method of casting a refractory article. The method includes providing a mold formed from a slurry composition comprising plaster and fibers and adding a refractory composition to the mold. The method also includes allowing the refractory composition to set. The refractory composition comprises colloidal silica.
Abstract translation: 铸造耐火制品的方法。 该方法包括提供由包含石膏和纤维的浆料组合物形成的模具，并向模具中加入耐火材料组合物。 该方法还包括使耐火材料组合物固化。 耐火材料组合物包括胶体二氧化硅。
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7.发明申请System and method for increasing yield from semiconductor wafer electroplating 有权用于提高半导体晶片电镀产量的系统和方法
公开(公告)号：US20060201802A1
公开(公告)日：2006-09-14
申请号：US11078179
申请日：2005-03-10
Applicant: Mohan Nagar , Shirish Shah
Inventor： Mohan Nagar , Shirish Shah
IPC: C25D17/06
CPC classification number: C25D7/12 , C25D17/001 , C25D17/06 , H01L21/2885 , H01L24/11 , H01L2224/13099 , H01L2924/00011 , H01L2924/00014 , H01L2924/0102 , H01L2924/01033 , H01L2924/01078 , H01L2924/014 , H01L2924/14 , H01L2224/0401
Abstract: A system and method increase yield from semiconductor wafer electroplating. The aspects include a semiconductor wafer, the semiconductor wafer comprising a plurality of die areas. A plating ring for holding the semiconductor wafer in position during electroplating is also included, the plating ring substantially surrounding a circumference of the semiconductor wafer and having a width that varies in order to avoid overlap near edge die areas of the semiconductor wafer.
Abstract translation: 一种系统和方法提高了半导体晶片电镀的产量。 这些方面包括半导体晶片，半导体晶片包括多个管芯区域。 还包括用于在电镀期间将半导体晶片保持就位的电镀环，电镀环基本上围绕半导体晶片的圆周并且具有变化的宽度，以避免在半导体晶片的边缘模具区域附近重叠。
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8.发明授权System and method for increasing yield from semiconductor wafer electroplating 有权用于提高半导体晶圆电镀产量的系统和方法
公开(公告)号：US07641776B2
公开(公告)日：2010-01-05
申请号：US11078179
申请日：2005-03-10
Applicant: Mohan Nagar , Shirish Shah
Inventor： Mohan Nagar , Shirish Shah
CPC classification number: C25D7/12 , C25D17/001 , C25D17/06 , H01L21/2885 , H01L24/11 , H01L2224/13099 , H01L2924/00011 , H01L2924/00014 , H01L2924/0102 , H01L2924/01033 , H01L2924/01078 , H01L2924/014 , H01L2924/14 , H01L2224/0401
Abstract: A system and method increase yield from semiconductor wafer electroplating. The aspects include a semiconductor wafer, the semiconductor wafer comprising a plurality of die areas. A plating ring for holding the semiconductor wafer in position during electroplating is also included, the plating ring substantially surrounding a circumference of the semiconductor wafer and having a width that varies in order to avoid overlap near edge die areas of the semiconductor wafer.
Abstract translation: 一种系统和方法提高了半导体晶片电镀的产量。 这些方面包括半导体晶片，半导体晶片包括多个管芯区域。 还包括用于在电镀期间将半导体晶片保持就位的电镀环，电镀环基本上围绕半导体晶片的圆周并且具有变化的宽度，以避免在半导体晶片的边缘模具区域附近重叠。
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9.发明申请METHOD AND MATERIAL FOR COUPLING SOLAR CONCENTRATORS AND PHOTOVOLTAIC DEVICES 审中-公开用于耦合太阳能集中器和光电器件的方法和材料
公开(公告)号：US20090151770A1
公开(公告)日：2009-06-18
申请号：US12331429
申请日：2008-12-09
Applicant: KEVIN R. GIBSON , Alelie Funcell , Abhay Maheshwari , Shirish Shah
Inventor： KEVIN R. GIBSON , Alelie Funcell , Abhay Maheshwari , Shirish Shah
IPC: H01L31/052 , B32B37/00 , H01L21/02 , H01L31/18
CPC classification number: B32B37/1207 , B32B37/1292 , B32B2457/12 , H01L31/0543 , H01L31/0547 , Y02E10/52
Abstract: A method and system for manufacturing an integrated concentrator photovoltaic device is disclosed. In an embodiment, the invention includes a one step process using a sheet of coupling material provided in a pre-arranged pattern to couple an array of photovoltaic members to an array of respective optical concentrating members. In another embodiment, the invention includes an integrated concentrator photovoltaic device made by coupling a photovoltaic member and an optical concentrating member together through an encapsulant or coupling layer formed from a sheet member of coupling materials possessing a pre-arranged pattern
Abstract translation: 公开了一种用于制造集成光伏装置的方法和系统。 在一个实施例中，本发明包括使用以预先布置的图案提供的耦合材料片将一组光电元件耦合到相应的光学聚集构件的阵列的一步法。 在另一个实施例中，本发明包括通过将光伏部件与光学聚集部件连接在一起的集成光集成电路装置，其通过由具有预先设置的图案的耦合材料的片状部件形成的密封剂或耦合层
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公开(公告)号：US20060128072A1
公开(公告)日：2006-06-15
申请号：US11011459
申请日：2004-12-13
Applicant: Sarathy Rajagopalan , Kishor Desai , Shirish Shah
Inventor： Sarathy Rajagopalan , Kishor Desai , Shirish Shah
IPC: H01L21/82
CPC classification number: H01L23/5256 , H01L2924/0002 , H01L2924/00
Abstract: A fuse formed in an integrated circuit die includes: a length of an electrically conductive material for connecting two points of a circuit on the integrated circuit die and for selectively breaking the connection by a pulse of electrical current sufficient to dissolve a portion of the electrically conductive material; a passivation layer formed over the length of electrically conductive material; and a protective coating formed over a portion of the length of electrically conductive material in addition to the passivation layer to avoid damage to the fuse from an etchant during a bumping process.
Abstract translation: 形成在集成电路管芯中的保险丝包括：用于连接集成电路管芯上的电路的两个点的导电材料的长度，并且用于通过足以溶解导电的一部分的电流的脉冲来选择性地断开连接 材料; 形成在导电材料的长度上的钝化层; 以及除了钝化层之外还在导电材料长度的一部分上形成的保护涂层，以避免在碰撞过程中从蚀刻剂损坏保险丝。
