公开(公告)号：US20240331611A1

公开(公告)日：2024-10-03

申请号：US18596520

申请日：2024-03-05

Applicant: Apple Inc.

Inventor： Hyunwoo Nho ,  Jie Won Ryu ,  Patrick R. Cruce ,  Yao Shi ,  Nicolas Le Dortz ,  Wei Xiong ,  Hyunsoo Kim ,  Wei H. Yao ,  Sun-Il Chang ,  Kingsuk Brahma ,  Ionut A. Mirel ,  Mahesh B. Chappalli ,  Ruicong Chen

IPC: G09G3/20 ,  G09G3/32

CPC classification number: G09G3/2096 ,  G09G3/2007 ,  G09G3/32 ,  G09G2300/0842 ,  G09G2320/0223 ,  G09G2320/0233 ,  G09G2320/0266 ,  G09G2330/021 ,  G09G2360/16

Abstract: Embodiments herein provide various apparatuses and techniques to efficiently mitigate front-of-screen (FoS) artifacts that may occur due to voltage fluctuations due to alternating current (AC) or direct current (DC) mechanisms that may occur in a variety of pixel types. In one embodiment, emission profile awareness circuitry may be implemented to mitigate for FoS artifacts due to DC mechanisms. Two-dimensional (2D) digital compensation circuitry may address the DC portion of the voltage fluctuations by accounting for an emission profile applied to content displayed on an electronic display. In some embodiments, the 2D digital compensation circuitry may compensate for the AC portion of the voltage fluctuations by duplicating the AC voltage fluctuations via voltage error subtraction circuitry and voltage error accumulation circuitry.