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公开(公告)号：US20190245673A1
公开(公告)日：2019-08-08
申请号：US16034165
申请日：2018-07-12
Applicant: ALi Corporation
Inventor： Wei-Jian Lin , Zhi-Ming Zeng
CPC classification number: H04L5/1461 , H04B3/235
Abstract: A communication device and an echo cancellation method are provided. A digital echo canceller is coupled to a transmitting circuit and a receiving circuit to generate an echo energy indicator according to a digital output signal and a digital input signal. A transceiving front-end circuit receives the analog output signal and generates a hybrid interface signal. A hybrid fine-tune circuit generates a first and a second capacitance calibration signals according to the echo energy indicator. An analog echo cancellation circuit receives the first and second capacitance calibration signals, and includes a first and a second variable capacitors controlled by the first capacitance calibration signal and a third and a fourth variable capacitors controlled by the second capacitance calibration signal. The analog echo cancellation circuit receives the analog output signal and the hybrid interface signal, and generates the analog input signal according to the first and second capacitance calibration signals.
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公开(公告)号：US12159864B2
公开(公告)日：2024-12-03
申请号：US17525966
申请日：2021-11-15
Applicant: ALi Corporation
Inventor： Tzu-Wei Lan , Wei-Jian Lin
IPC: H01L27/01 , G06F30/398 , H03M1/38
Abstract: Provided is a layout structure adapted for a signal format converter. The layout structure includes a first and a second capacitor array. The first capacitor array is disposed on one side of a reference axis, and includes multiple first capacitor units that form multiple first capacitors. The first capacitors respectively have multiple first capacitances. The second capacitor array is disposed on the other side of the reference axis, and includes multiple second capacitor units that form multiple second capacitors. The second capacitors respectively have multiple second capacitances. The first capacitors respectively correspond to the second capacitors. Each first capacitor and each corresponding second capacitor are symmetrical with respect to the reference axis, or each first capacitor and each corresponding second capacitor are separated from each other by the same distance. Each first capacitor and each corresponding second capacitor have the same capacitance.
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公开(公告)号：US20220165723A1
公开(公告)日：2022-05-26
申请号：US17525966
申请日：2021-11-15
Applicant: ALi Corporation
Inventor： Tzu-Wei Lan , Wei-Jian Lin
IPC: H01L27/01
Abstract: Provided is a layout structure adapted for a signal format converter. The layout structure includes a first and a second capacitor array. The first capacitor array is disposed on one side of a reference axis, and includes multiple first capacitor units that form multiple first capacitors. The first capacitors respectively have multiple first capacitances. The second capacitor array is disposed on the other side of the reference axis, and includes multiple second capacitor units that form multiple second capacitors. The second capacitors respectively have multiple second capacitances. The first capacitors respectively correspond to the second capacitors. Each first capacitor and each corresponding second capacitor are symmetrical with respect to the reference axis, or each first capacitor and each corresponding second capacitor are separated from each other by the same distance. Each first capacitor and each corresponding second capacitor have the same capacitance.
