-
公开(公告)号：US07554185B2
公开(公告)日：2009-06-30
申请号：US11718396
申请日：2005-10-31
Applicant: Chee Seng Foong , Aminuddin Ismail , Wai Yew Lo , Bee Hoon Liau , Jin- Mei Liu , Jian- Hong Wang , Jin- Zhong Yao , Fu- Bin Song
Inventor： Chee Seng Foong , Aminuddin Ismail , Wai Yew Lo , Bee Hoon Liau , Jin- Mei Liu , Jian- Hong Wang , Jin- Zhong Yao , Fu- Bin Song
IPC: H01L23/02
CPC classification number: H01L25/0657 , H01L24/73 , H01L25/0652 , H01L2224/16225 , H01L2224/32145 , H01L2224/48091 , H01L2224/48145 , H01L2224/48227 , H01L2224/4824 , H01L2224/48465 , H01L2224/49109 , H01L2224/73265 , H01L2225/06506 , H01L2225/0651 , H01L2225/06517 , H01L2225/06572 , H01L2225/06586 , H01L2924/01079 , H01L2924/14 , H01L2924/15311 , H01L2924/1532 , H01L2924/16152 , H01L2924/00014 , H01L2924/00 , H01L2924/00012
Abstract: A semiconductor package and method of forming the package, including a substrate having an opening formed therein. Contact pads are formed about a periphery of the opening on a first side of the substrate and a second opposing side of the substrate. A flip chip die is mounted to the substrate, having an active side mounted on a first side of the substrate and in electrical communication with at least some of the contact pads formed on the first side of the substrate. At least one wire bond die is mounted through the opening, with a non-active side mounted on the active side of the flip chip die. The wire bond die is in electrical communication with at least some of the plurality of contact pads formed on the second opposing side of the substrate.
Abstract translation: 一种形成封装的半导体封装和方法，包括其中形成有开口的基板。 在衬底的第一侧和衬底的第二相对侧上围绕开口的周边形成接触焊盘。 倒装芯片裸片安装到基板上，其主动侧安装在基板的第一侧上并且与形成在基板的第一侧上的至少一些接触焊盘电连通。 通过开口安装至少一个引线接合管芯，其中非有源侧安装在倒装芯片管芯的有源侧上。 引线接合管芯与形成在基板的第二相对侧上的多个接触焊盘中的至少一些电连接。
-
公开(公告)号：US20080111248A1
公开(公告)日：2008-05-15
申请号：US11718396
申请日：2005-10-31
Applicant: Chee Seng Foong , Aminuddin Ismail , Wai Yew Lo , Bee Hoon Liau , Jin-Mei Liu , Jian-Hong Wang , Jin-Zhong Yao , Fu-Bin Song
Inventor： Chee Seng Foong , Aminuddin Ismail , Wai Yew Lo , Bee Hoon Liau , Jin-Mei Liu , Jian-Hong Wang , Jin-Zhong Yao , Fu-Bin Song
CPC classification number: H01L25/0657 , H01L24/73 , H01L25/0652 , H01L2224/16225 , H01L2224/32145 , H01L2224/48091 , H01L2224/48145 , H01L2224/48227 , H01L2224/4824 , H01L2224/48465 , H01L2224/49109 , H01L2224/73265 , H01L2225/06506 , H01L2225/0651 , H01L2225/06517 , H01L2225/06572 , H01L2225/06586 , H01L2924/01079 , H01L2924/14 , H01L2924/15311 , H01L2924/1532 , H01L2924/16152 , H01L2924/00014 , H01L2924/00 , H01L2924/00012
Abstract: A semiconductor package (100, 150, 200, 250), and method of forming the package, including a substrate (102, 102′, 202, 202′) having an opening (104, 104′, 204, 204′) formed therein. Contact pads (112, 112′, 212, 212′) are formed about a periphery of the opening on a first side of the substrate (106, 106′, 206, 206′) and a second opposing side (132, 132′, 232, 232′) of the substrate. A flip chip die (120, 120′, 220, 220′) is mounted to the substrate, having an active side (114, 114′, 214, 214′) mounted on a first side of the substrate and in electrical communication with at least some of the contact pads formed on the first side of the substrate. At least one wire bond die (110, 110′, 210, 210′) is mounted through the opening, with a non-active side mounted on the active side of the flip chip die. The wire bond die is in electrical communication with at least some of the plurality of contact pads formed on the second opposing side of the substrate.
Abstract translation: 一种形成封装的半导体封装（100,150,200,250）以及包括其中形成在其中的开口（104,104'，204,204'）的衬底（102,102'，202,202'）的方法， 。 在衬底（106,106'，206,206'）的第一侧上围绕开口的周边形成接触焊盘（112,112'，212,212'）和第二相对侧（132,132'， 232,232'）。 倒装芯片模具（120,120'，220,220'）安装到衬底上，具有安装在衬底的第一侧上并与之电气连通的有源侧（114,114'，214,214'） 在衬底的第一侧上形成的至少一些接触焊盘。 至少一个引线接合管芯（110,110'，210,210'）穿过开口安装，其中非有源侧安装在倒装芯片裸片的有源侧上。 引线接合管芯与形成在基板的第二相对侧上的多个接触焊盘中的至少一些电连接。
-
公开(公告)号：US20060038266A1
公开(公告)日：2006-02-23
申请号：US10955359
申请日：2004-09-30
Applicant: Fu-Bin Song , Yan-Feng Liu , Zhi-Jie Wang
Inventor： Fu-Bin Song , Yan-Feng Liu , Zhi-Jie Wang
IPC: H01L23/495
CPC classification number: H01L21/6835 , H01L23/3107 , H01L23/3142 , H01L24/45 , H01L24/48 , H01L24/97 , H01L29/0657 , H01L2224/45144 , H01L2224/45147 , H01L2224/48091 , H01L2224/48247 , H01L2224/97 , H01L2924/00014 , H01L2924/01006 , H01L2924/01015 , H01L2924/01023 , H01L2924/01029 , H01L2924/01033 , H01L2924/01076 , H01L2924/01079 , H01L2924/01082 , H01L2924/10158 , H01L2924/10253 , H01L2924/14 , H01L2924/181 , H01L2924/18165 , H01L2224/85 , H01L2924/00 , H01L2924/00012 , H01L2224/45015 , H01L2924/207
Abstract: A semiconductor device (20) includes an integrated circuit (22) having a plurality of bonding pads (24) located on a peripheral portion of its top surface and a groove (26) formed in its bottom surface (28). The groove (26) extends from one end to an opposite end of the IC (22). Lead fingers (30) that surround the IC (22) are electrically connected to respective ones of the bonding pads (24) via wirebonding. A mold compound (34) covers the top surfaces of the IC (22) and the lead fingers (30), and the electrical connections. At least the bottom surfaces of the lead fingers (30) and the IC (22) are exposed, except for the groove (26), which is filled with the mold compound (34).
Abstract translation: 半导体器件（20）包括集成电路（22），其具有位于其顶表面的周边部分上的多个接合焊盘（24）和形成在其底表面（28）中的凹槽（26）。 槽（26）从IC（22）的一端延伸到另一端。 围绕IC（22）的引线指（30）通过引线接合电连接到相应的焊盘（24）。 模具化合物（34）覆盖IC（22）和引线指（30）的顶表面和电连接。 除了填充有模具化合物（34）的槽（26）之外，至少引线指（30）和IC（22）的底表面露出。
