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81.发明公开公开(公告)号：US20240153571A1
公开(公告)日：2024-05-09
申请号：US17776306
申请日：2021-05-26
Inventor： Can YUAN , Yongqian LI , Zhidong YUAN
IPC: G11C19/28 , G09G3/3225
CPC classification number: G11C19/28 , G09G3/3225 , G09G2300/0842 , G09G2310/0286 , G09G2310/08
Abstract: A shift register includes: an input circuit electrically connected to a first clock signal terminal, a first voltage signal terminal and a first node; a first output circuit electrically connected to the first node, a second clock signal terminal and a scanning signal terminal; a first control circuit electrically connected to a third clock signal terminal, a fourth clock signal terminal, a fifth clock signal terminal and the first node; a second control circuit electrically connected to a sixth clock signal terminal, a second voltage signal terminal, the first node, the first voltage signal terminal and a second node; a third control circuit electrically connected to the first node, the second voltage signal terminal, the third clock signal terminal and the second node; and a second output circuit electrically connected to the second node, the second voltage signal terminal and the scanning signal terminal.
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82.发明公开公开(公告)号：US20240087661A1
公开(公告)日：2024-03-14
申请号：US17766828
申请日：2021-04-15
Inventor： Zhidong YUAN , Yongqian LI , Can YUAN
CPC classification number: G11C19/28 , G09G3/32 , G09G2300/0426 , G09G2310/0286 , G09G2310/08
Abstract: A shift register unit and a control method thereof, a gate driving circuit, and a display device are provided. The shift register unit comprises: a first control circuit (110) and an energy storage circuit (150), which directly control the potential of a first node (Q1); a pull-down control circuit (120), a second control circuit (130) and a first pull-down circuit (140), which indirectly control the potential of the first node (Q1); and an output circuit (160), which outputs, under the control of the potential of the first node (Q1), a first voltage signal provided by a first voltage end (VDD) to a signal output end. By means of the shift register unit, the control method thereof and the gate drive circuit, the pulse width of a gate scanning signal can be adjusted, thereby meeting various display requirements.
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公开(公告)号：US20240078978A1
公开(公告)日：2024-03-07
申请号：US18262124
申请日：2022-08-05
Inventor： Can YUAN , Yongqian LI , Zhidong YUAN , Luke DING
IPC: G09G3/3266 , G09G3/3233 , G09G3/3275 , H10K59/12 , H10K59/121 , H10K59/131 , H10K59/38
CPC classification number: G09G3/3266 , G09G3/3233 , G09G3/3275 , H10K59/1201 , H10K59/1213 , H10K59/1216 , H10K59/1315 , H10K59/38 , G09G2300/0842
Abstract: A display substrate including a base substrate and a plurality of pixel units on the base substrate. Each pixel unit includes: a plurality of sub-pixels and at least one scanning line. The plurality of sub-pixels are arranged sequentially in a first direction, each sub-pixels includes a sub-pixel driving circuit and a light-emitting element, and the sub-pixel driving circuit is coupled to the light-emitting element. Each scanning line includes a first scanning conductive layer and a second scanning conductive layer arranged in a laminated manner, the first scanning conductive layer is coupled to the second scanning conductive layer, the first scanning conductive layer includes at least a portion extending in the first direction, and the first scanning conductive layer is coupled to a plurality of sub-pixel driving circuits in the plurality of sub-pixels.
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公开(公告)号：US20240057418A1
公开(公告)日：2024-02-15
申请号：US18492194
申请日：2023-10-23
Inventor： Zhongyuan WU , Yongqian LI , Can YUAN , Zhidong YUAN , Meng LI , Dacheng ZHANG , Lang LIU
IPC: H10K59/131
CPC classification number: H10K59/1315
Abstract: Embodiments of the present disclosure provide a display panel and a display device. The display panel includes a base substrate, a plurality of pixel units and a plurality of gate line groups. At least one pixel unit includes a plurality of sub-pixels. At least one sub-pixel includes a sensing transistor and a driving transistor. Each gate line group includes a first gate line and a second gate line; for the first gate line and the second gate line corresponding to the sub-pixels in the same row, the positions of the sensing transistors are closer to the second gate lines, and the positions of the driving transistors are closer to the first gate line, For two sub-pixels close to each other and located in different pixel units in the same row, at least one signal line has a double-layer alignment structure, and the double-layer alignments are electrically connected with each other.
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公开(公告)号：US20230413629A1
公开(公告)日：2023-12-21
申请号：US18029675
申请日：2022-03-09
Inventor： Can YUAN , Yongqian LI
IPC: H10K59/131 , H10K59/121 , H10K59/35 , H10K59/12
CPC classification number: H10K59/1315 , H10K59/1213 , H10K59/1216 , H10K59/351 , H10K59/1201 , H10K59/353
Abstract: A display substrate, a manufacturing method therefor, and a display device. The display substrate comprises multiple display units, and each display unit includes a display area and a transparent area; each display area is provided with a first power supply line and a second power supply line along a first direction, the display area is provided with a first scan signal line, a second scan signal line, a second scan connection line, and a first scan connection line along a second direction, and the second scan connection line and the second scan signal line are connected into a first annular structure; each display area is further provided with a third scan connection line, and the third scan connection line, the first scan connection line, and the first scan signal line are connected into a second annular structure.
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Patent Agency Ranking
公开(公告)号：US20230343286A1
公开(公告)日：2023-10-26
申请号：US17913885
申请日：2021-10-28
Inventor： Jianwei YU , Yongqian LI , Can YUAN
IPC: G09G3/3233 , G09G3/3291 , G09G3/3266
CPC classification number: G09G3/3233 , G09G3/3291 , G09G3/3266 , G09G2300/0426 , G09G2300/0465 , G09G2320/0626 , G09G2300/0452
Abstract: Provided are a pixel structure, a method for driving the same and a display substrate. The pixel structure includes N pixel circuits and a power writing control circuit, N≥2 and N is an integer. Each pixel circuit includes a pixel driving sub-circuit and a light-emitting device. The power writing control circuit provides, according to a voltage regulation control signal, a first power voltage for each pixel circuit in a light-emitting phase. The pixel driving sub-circuit provides, according to a data voltage signal, a driving current for the light-emitting device under the control of a first scanning signal. Light-emitting devices in the pixel circuits are sequentially connected in series, a first electrode of the light-emitting device in the first pixel circuit is connected to the power writing control circuit, a second electrode of the light-emitting device in the Nth pixel circuit is connected to a second power terminal.
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公开(公告)号：US20230157110A1
公开(公告)日：2023-05-18
申请号：US16976796
申请日：2019-11-29
Inventor： Zhongyuan WU , Yongqian LI , Can YUAN , Zhidong YUAN , Meng LI , Dacheng ZHANG , Lang LIU
IPC: H10K59/131
CPC classification number: H10K59/1315
Abstract: Embodiments of the present disclosure provide a display panel and a display device. The display panel includes a base substrate, a plurality of pixel units and a plurality of gate line groups. At least one pixel unit includes a plurality of sub-pixels. At least one sub-pixel includes a sensing transistor and a driving transistor. Each gate line group includes a first gate line and a second gate line; for the first gate line and the second gate line corresponding to the sub-pixels in the same row, the positions of the sensing transistors are closer to the second gate lines, and the positions of the driving transistors are closer to the first gate line, For two sub-pixels close to each other and located in different pixel units in the same row, at least one signal line has a double-layer alignment structure, and the double-layer alignments are electrically connected with each other.
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88.发明申请公开(公告)号：US20230095733A1
公开(公告)日：2023-03-30
申请号：US16971550
申请日：2019-10-29
Inventor： Can YUAN , Yongqian LI , Zhidong YUAN
IPC: G09G5/00 , G09G3/3208
Abstract: The present disclosure provides a display substrate, a method for manufacturing the same, a driving method and a display device. The display substrate includes a base substrate, gate lines, data lines and sub-pixels. The sub-pixels include sub-pixel columns corresponding to the data lines in a one-to-one manner. In a sub-pixel driving circuit of the sub-pixel, a driving transistor and a data writing transistor are located at a first side of an aperture area of the sub-pixel; a sensing transistor is located at a second side of the aperture area of the sub-pixel. The first side and the second side are opposite sides of the aperture area along the extension direction of the data lines. Gate electrodes of sensing transistors in a same sub-pixel row, and gate electrodes of data writing transistors in an adjacent next sub-pixel row, are all coupled to a gate line corresponding to the adjacent next sub-pixel row. There is a first overlapping area between an orthographic projection of a first electrode plate of the storage capacitor to the base substrate and an orthographic projection of a second electrode plate of the storage capacitor to the base substrate; an orthographic projection of the first overlapping area to the base substrate at least partially overlaps an orthographic projection of the corresponding aperture area of the sub-pixel.
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公开(公告)号：US20230080385A1
公开(公告)日：2023-03-16
申请号：US17802776
申请日：2021-10-13
Inventor： Can YUAN , Yongqian LI , Zhidong YUAN
IPC: G09G3/36
Abstract: A display substrate has a display area and a peripheral area. The display substrate includes a plurality of sub-pixels, a plurality of groups of gate scan signal lines, and a plurality of groups of data lines. Each group of gate scan signal lines includes at least one gate scan signal line, each group of data lines includes n data lines, and the plurality of sub-pixels are arranged in an array; and n is greater than or equal to 2. A group of gate scan signal lines is electrically connected to n rows of sub-pixels. A column of sub-pixels is electrically connected to a group of data lines, and includes a plurality of groups of sub-pixels. Each group of sub-pixels includes n sub-pixels. The n sub-pixels are respectively electrically connected to n data lines in the group of data lines to which this column of sub-pixels is electrically connected.
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公开(公告)号：US20220359623A1
公开(公告)日：2022-11-10
申请号：US17869079
申请日：2022-07-20
Inventor： Zhongyuan WU , Yongqian LI , Can YUAN , Zhidong YUAN , Meng LI , Dacheng ZHANG , Lang LIU
IPC: H01L27/32
Abstract: A display substrate and a display device are provided. The display substrate includes a base substrate and sub-pixels on the base substrate. At least one sub-pixel includes a first transistor, a second transistor and a storage capacitor. The display substrate further includes an extension portion protruding from the gate electrode of the first transistor, and the extension portion is extended from the gate electrode of the first transistor in the second direction; the extension portion is at least partially overlapped with the first electrode of the second transistor in a direction perpendicular to the base substrate and is electrically connected with the first electrode of the second transistor; in the first direction, the extension portion has a second side closest to the second capacitor electrode, and the second side is recessed in a direction away from the second capacitor electrode.
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