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公开(公告)号:US12039942B2
公开(公告)日:2024-07-16
申请号:US17846765
申请日:2022-06-22
申请人: LG DISPLAY CO., LTD.
发明人: Kyu Jin Kim , Seung Taek Oh , Dong Gun Lee
IPC分类号: G09G3/34 , G09G3/3233 , G09G3/3266
CPC分类号: G09G3/3406 , G09G3/3233 , G09G3/3266 , G09G2300/0452 , G09G2300/0819 , G09G2300/0842 , G09G2310/08 , G09G2320/0626 , G09G2320/0686
摘要: A display device can include a display panel to display an input image across a first subpixel region and a second subpixel region; a display panel driver to supply pixel data of the input image to subpixels of the display panel; a light source disposed under the display panel in an area overlapped by the second subpixel region; and a controller to drive the light source in an emission permitting section set within a non-driving period of a group of subpixels among the subpixels that are disposed in at least a portion of the second subpixel region.
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公开(公告)号:US20240233651A1
公开(公告)日:2024-07-11
申请号:US18613731
申请日:2024-03-22
发明人: Pengfei YU , Qiang ZHANG , Tinghua SHANG , Lu BAI , Jie DAI , Chenxing WAN , Haigang QING
IPC分类号: G09G3/3266 , G11C19/28 , H01L21/77 , H01L27/12
CPC分类号: G09G3/3266 , G11C19/28 , G09G2230/00 , G09G2300/0408 , G09G2300/0426 , G09G2310/0286 , G09G2310/061 , H01L21/77 , H01L27/12
摘要: A display substrate and a manufacturing method thereof, and a display device are provided. The display substrate includes a base substrate, and a shift register unit, a first clock signal line, and a second clock signal line in a peripheral region; a first portion and a second portion of a first connection wire of the display substrate are connected to a first gate electrode of a first control transistor of the shift register unit; an orthographic projection of the first portion on the base substrate is on a side of an orthographic projection of an active layer of the first control transistor on the base substrate away from a display region; and an orthographic projection of the second portion on the base substrate is on a side of the orthographic projection of the active layer of the first control transistor on the base substrate close to the display region.
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公开(公告)号:US12035593B2
公开(公告)日:2024-07-09
申请号:US17922146
申请日:2021-05-21
发明人: Hongjun Zhou , Wen Tan
IPC分类号: H10K59/131 , G09G3/3225 , G09G3/3266
CPC分类号: H10K59/131 , G09G3/3225 , G09G3/3266 , G09G2300/0408 , G09G2310/0297 , G09G2320/045 , G09G2330/12
摘要: A display substrate and a manufacturing method therefor, and a display device. The display substrate includes a display region and a non-display region surrounding the display region, the non-display region includes a wire having a corner; and the display substrate further includes at least one electrostatic protection circuit, the electrostatic protection circuit is electrically connected with the wire at the corner, and the electrostatic protection circuit is configured to eliminate static electricity generated at the corner.
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公开(公告)号:US12033586B2
公开(公告)日:2024-07-09
申请号:US18273041
申请日:2022-08-23
发明人: Shaolei Zong , Wei Sun , Rui Liu , Jigang Sun , Kuanjun Peng
IPC分类号: G09G3/3266 , G11C19/28
CPC分类号: G09G3/3266 , G11C19/28 , G09G2300/0842 , G09G2310/0286 , G09G2310/061
摘要: A display panel, a gate drive circuit and a driving method thereof. The gate drive circuit includes drive units. A first cascaded input end OUT(n−1) of a first shift register (100) of each of the drive units is connected to a different start signal end STV; a plurality of drive units in the drive units include a reset control sub-circuit (9), where the reset control sub-circuit (9) is connected with a second cascaded input end OUT(n+1) of a last shift register (100) and one or more start signal ends STV, and is configured to control an electric potential of the second cascaded input end OUT(n−1) according to an electric potential of the one or more start signal ends STV.
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公开(公告)号:US12033585B1
公开(公告)日:2024-07-09
申请号:US18236862
申请日:2023-08-22
发明人: Kyung Ho Kim , Yi Kyoung You , Kee Chan Park , Sang Yong No , Gi Chang Lee
IPC分类号: G09G3/3266 , G09G3/3233
CPC分类号: G09G3/3266 , G09G3/3233 , G09G2310/08 , G09G2330/028
摘要: A scan signal driver includes: a plurality of stages configured to be driven by dividing a first frame period into a display period and a sensing period, and to sequentially output scan signals at the display period, wherein each of the plurality of stages comprises: an output control circuit; and a memory control circuit, wherein the scan driver is configured to: irregularly set a specific stage of the plurality of stages at a display period every frame; control the specific stage to: store a voltage by using the memory control circuit; and output a sensing signal by using the stored voltage at a sensing period, and the memory control circuit includes: a second memory transistor configured to electrically connect an M node with an I node; and a third memory transistor configured to electrically connect the output control circuit with the I node.
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66.
公开(公告)号:US20240221850A1
公开(公告)日:2024-07-04
申请号:US17913617
申请日:2021-10-28
IPC分类号: G11C19/28 , G09G3/32 , G09G3/3266
CPC分类号: G11C19/28 , G09G3/32 , G09G3/3266 , G09G2300/0852 , G09G2310/0286
摘要: A shift register includes a first input sub-circuit being configured to transmit an input signal to a first node under control of a first clock signal; a second input sub-circuit being configured to transmit a first voltage signal to a second node under control of the first clock signal; a first control sub-circuit being configured to transmit a second clock signal to a third node under control of a voltage at the second node; a second control sub-circuit being configured to transmit the first voltage signal to a fourth node under control of a third clock signal; a noise reduction sub-circuit being configured to transmit the first voltage signal to a signal output terminal under control of a voltage at the fourth node; and an output sub-circuit being configured to transmit a second voltage signal to the signal output terminal under control of a voltage at the third node.
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公开(公告)号:US20240221683A1
公开(公告)日:2024-07-04
申请号:US18517384
申请日:2023-11-22
申请人: LG Display Co., Ltd.
发明人: Sanghyun PARK
IPC分类号: G09G3/3266 , G09G3/3233
CPC分类号: G09G3/3266 , G09G3/3233 , G09G2300/0852 , G09G2310/0243 , G09G2310/0291 , G09G2310/08 , G09G2320/02 , G09G2330/028 , G09G2330/12
摘要: A display device according to an aspect comprises a display panel that includes a plurality of pixels configured to display an image; a gate driving circuit configured to output respective scan signals to gate lines of the display panel; and a controller configured to (1) determine a deviation between the scan signals applied to the gate lines of the display panel and (2) compensate for the deviation when it is determined that the deviation is greater than a threshold.
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公开(公告)号:US20240221677A1
公开(公告)日:2024-07-04
申请号:US18384357
申请日:2023-10-26
申请人: LG DISPLAY CO., LTD.
发明人: Shinji TAKASUGI , Hyun-Jong JI
IPC分类号: G09G3/3266 , G09G3/3275
CPC分类号: G09G3/3266 , G09G3/3275 , G09G2310/0278 , G09G2310/08 , G09G2330/021
摘要: A display device includes a display panel having a plurality of subpixels arranged in a row and a column; a first gate driving unit supplying a plurality of gate signals to the first subpixel through a plurality of first gate lines; a second gate driving unit supplying the plurality of gate signals to the second subpixel through a plurality of second gate lines; a data driving unit supplying a plurality of data signals through the plurality of data lines; and a timing controlling unit controlling the first gate driving unit, the second gate driving unit and the data driving unit, wherein the timing controlling unit controls the first gate driving unit independently from the second gate driving unit to consecutively supply the plurality of gate signals to the first subpixel through the plurality of first gate lines.
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公开(公告)号:US20240221676A1
公开(公告)日:2024-07-04
申请号:US18236862
申请日:2023-08-22
发明人: Kyung Ho KIM , Yi Kyoung YOU , Kee Chan PARK , Sang Yong NO , Gi Chang LEE
IPC分类号: G09G3/3266 , G09G3/3233
CPC分类号: G09G3/3266 , G09G3/3233 , G09G2310/08 , G09G2330/028
摘要: A scan signal driver includes: a plurality of stages configured to be driven by dividing a first frame period into a display period and a sensing period, and to sequentially output scan signals at the display period, wherein each of the plurality of stages comprises: an output control circuit; and a memory control circuit, wherein the scan driver is configured to: irregularly set a specific stage of the plurality of stages at a display period every frame; control the specific stage to: store a voltage by using the memory control circuit; and output a sensing signal by using the stored voltage at a sensing period, and the memory control circuit includes: a second memory transistor configured to electrically connect an M node with an I node; and a third memory transistor configured to electrically connect the output control circuit with the I node.
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公开(公告)号:US20240221663A1
公开(公告)日:2024-07-04
申请号:US18542232
申请日:2023-12-15
申请人: LG Display Co., Ltd.
发明人: Junghyeon Kim , Taewook Kim
IPC分类号: G09G3/3233 , G09G3/3266
CPC分类号: G09G3/3233 , G09G3/3266 , G09G3/2092 , G09G2300/0819 , G09G2300/0842
摘要: A display device comprises a pixel circuit including a driving element having a gate electrode connected to a first node and a source electrode connected to a second node, a light emitting element connected to the second node, a first switch element that connects a data line and the first node, and a second switch element that connects a reference voltage line and the second node; a gate driver that supplies a scan signal to the gate line; and a sensing circuit that senses a voltage of the reference voltage line during a sensing period, wherein during an initialization period the scan signal is higher than the sensing data voltage, during the sensing period, the scan signal is higher than the first ground voltage and lower than the sensing data voltage, during the sensing period, a voltage of the second node is stored in a sensing capacitor.
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