公开(公告)号：US10944011B2

公开(公告)日：2021-03-09

申请号：US16594284

申请日：2019-10-07

Applicant: SAMSUNG DISPLAY CO., LTD.

Inventor： Tae Hoon Yang ,  Kibum Kim ,  Jongjun Baek ,  Byung Soo So ,  Jong chan Lee ,  Woong Hee Jeong ,  Jaewoo Jeong

IPC: H01L27/12 ,  H01L29/786

Abstract: A display apparatus includes a base substrate, an active pattern on the base substrate including a source region, a drain region, and a channel region that is doped between the source region and the drain region, the channel region including polycrystalline silicon, and a gate electrode overlapping the channel region of the active pattern. The channel region may include a lower portion, an upper portion, and an intermediate portion between the upper portion and the lower portion, and a dopant density of the lower portion may be 80% or more of a dopant density of the upper portion.

公开(公告)号：US10909929B2

公开(公告)日：2021-02-02

申请号：US16210379

申请日：2018-12-05

Applicant: Samsung Display Co., Ltd.

Inventor： Tae Hoon Yang ,  Ki Bum Kim ,  Jong Chan Lee ,  Woong Hee Jeong

IPC: G11C19/00 ,  G09G3/3266 ,  G09G3/3291 ,  G09G3/3233 ,  G09G3/3258 ,  H01L27/32 ,  G09G3/36 ,  G11C19/28

Abstract: A scan driver includes stage circuits, each including: a first circuit including a control terminal (CT) connected to a first node (N1), and connecting/disconnecting a previous scan line of a previous stage circuit to a second node (N2) based on a control signal (CS); a second circuit including a CT connected to a clock signal line, and connecting one of a first power voltage line (FPVL) and a second power voltage line (SPVL) to the N1 based on a CS; a third circuit including a CT connected to the N2, and connecting one of the N1 and the SPVL to a third node (N3) based on a CS; a fourth circuit including a CT connected to the N3, and connecting one of the FPVL and the SPVL to a current scan line based on a CS; and a first capacitor connecting the CT of the third circuit and the SPVL.

公开(公告)号：US10714556B2

公开(公告)日：2020-07-14

申请号：US16296755

申请日：2019-03-08

Applicant: SAMSUNG DISPLAY CO., LTD.

Inventor： Woong Hee Jeong ,  Tae Hoon Yang ,  Jong Chan Lee

IPC: H01L27/32 ,  G09G3/3233 ,  H01L27/12

Abstract: A transistor substrate may include a base substrate, and a switching transistor and a driving transistor provided on the base substrate. The driving transistor includes: an active pattern provided on the base substrate and including a source region, a drain region spaced apart from the source region, and a channel region provided between the source region and the drain region; a gate electrode at least partially overlapping the active pattern; a gate insulating film provided between the active pattern and the gate electrode; a source electrode insulated from the gate electrode and connected to the source region; a drain electrode insulated from the gate electrode and connected to the drain region; and at least one dummy hole adjacent to the channel region.

公开(公告)号：US20190311675A1

公开(公告)日：2019-10-10

申请号：US16372296

申请日：2019-04-01

Applicant: Samsung Display Co., Ltd.

Inventor： Tae Hoon Yang ,  Ki Bum Kim ,  Jong Chan Lee ,  Woong Hee Jeong

IPC: G09G3/3233 ,  G09G3/3266 ,  G09G3/3283 ,  H01L27/32

Abstract: A pixel including a light emitting element, a first transistor connected between a first node and the light emitting element to control current flowing from a first power supply to a second power supply, a second transistor connected between a data line and the first transistor to be turned on by an ith first scan signal, a third transistor including a P-type TFT connected between the first transistor and the first node to be turned on by the ith first scan signal and, a fourth transistor including an N-type TFT connected between the first node and an initialization power supply line to be turned on by an i−1th scan signal, and a first connection line connected between the third and fourth transistors to electrically connect semiconductor patterns thereof, in which the first connection line is disposed on the third and fourth transistors and contacts the semiconductor patterns thereof.