Integrated circuit having multiple data outputs sharing a resistor
network
    61.
    发明授权
    Integrated circuit having multiple data outputs sharing a resistor network 失效
    具有共享电阻网络的多个数据输出的集成电路

    公开(公告)号:US5099148A

    公开(公告)日:1992-03-24

    申请号:US601288

    申请日:1990-10-22

    CPC分类号: H03K17/16

    摘要: An output driver arrangement for an integrated circuit having multiple output terminals is disclosed. Each of the output drivers is a push-pull driver, with the gates of the pull-up and pull-down transistors each controlled by a logic circuit; the logic circuits perform a logical combination of the data to be presented and an output disable signal. In order to control the switching speed of the outputs, and thus to reduce induced noise, each of the logic circuits share a resistor network at their bias nodes. For example, each of the logic circuits controlling the pull-up device share a resistor network for bias from V.sub.cc, and a resistor network for bias to ground; similarly, each of the logic circuits controlling the pull-down device share a resistor network for bias from V.sub.cc and a resistor network for bias to ground. Various arrangements including fuses may be used to allow selection of the resistance value of each of the networks, according to the performance of the circuit or in response to product demand.

    摘要翻译: 公开了一种具有多个输出端的集成电路的输出驱动器装置。 每个输出驱动器都是一个推挽式驱动器,其上拉和下拉晶体管的栅极均由逻辑电路控制; 逻辑电路执行要呈现的数据和输出禁止信号的逻辑组合。 为了控制输出的开关速度,并且因此减小感应噪声,每个逻辑电路在其偏置节点处共享电阻器网络。 例如,控制上拉装置的每个逻辑电路共享用于Vcc偏置的电阻网络和用于偏置到地的电阻网络; 类似地,控制下拉装置的每个逻辑电路共享用于来自Vcc的偏置的电阻网络和用于偏置到地的电阻网络。 可以使用包括保险丝的各种布置来根据电路的性能或响应于产品需求来选择每个网络的电阻值。