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    Apparatus and method for performing bit de-collection in a communication system using a high speed downlink packet access (HSDPA) scheme
    61.
    发明授权
    Apparatus and method for performing bit de-collection in a communication system using a high speed downlink packet access (HSDPA) scheme 有权
    在使用高速下行链路分组接入（HSDPA）方案的通信系统中执行比特解除收集的装置和方法

    公开(公告)号：US07269776B2

    公开(公告)日：2007-09-11

    申请号：US10989557

    申请日：2004-11-17

    申请人： Dong-Wook Park ,  Joo-Kwang Kim ,  Jung-Hwan Rim

    发明人： Dong-Wook Park ,  Joo-Kwang Kim ,  Jung-Hwan Rim

    IPC分类号： H03M13/00

    CPC分类号： H04L1/0068 ,  H04L1/0071 ,  H04L1/1812

    摘要： An apparatus and a method for performing a bit de-collection according to a hybrid automatic retransmission request are disclosed. The apparatus includes a column counter for increasing one column every four bits and outputting a position of a current column in response to received bit sequences; a state detector for outputting state information of the current column by means of an output value of the column counter, a parameter denoting a number of rows to which systematic bits have been assigned, and a parameter denoting a number of columns to which the systematic bits have been assigned; and address generators for generating write addresses required for performing a write operation and read addresses required for performing a read operation according to the state information output from the state detector.

    摘要翻译： 公开了一种根据混合自动重传请求进行位解除收集的装置和方法。 该装置包括用于每四位增加一列的列计数器，并响应于接收的位序列输出当前列的位置; 状态检测器，用于通过列计数器的输出值输出当前列的状态信息，表示已经分配了系统位的行的数量的参数，以及表示系统位的列数的参数 已分配 以及用于产生执行写入操作所需的写入地址的地址发生器，以及根据从状态检测器输出的状态信息来读取执行读取操作所需的地址。