公开(公告)号：US20190026150A1

公开(公告)日：2019-01-24

申请号：US15655648

申请日：2017-07-20

Applicant: CISCO TECHNOLOGY, INC.

Inventor： Komei Shimamura ,  Xinyuan Huang ,  Amit Kumar Saha ,  Debojyoti Dutta

IPC: G06F9/48 ,  G06F9/50

Abstract: In one embodiment, a method for FPGA accelerated serverless computing comprises receiving, from a user, a definition of a serverless computing task comprising one or more functions to be executed. A task scheduler performs an initial placement of the serverless computing task to a first host determined to be a first optimal host for executing the serverless computing task. The task scheduler determines a supplemental placement of a first function to a second host determined to be a second optimal host for accelerating execution of the first function, wherein the first function is not able to accelerated by one or more FPGAs in the first host. The serverless computing task is executed on the first host and the second host according to the initial placement and the supplemental placement.

公开(公告)号：US20180341411A1

公开(公告)日：2018-11-29

申请号：US15811318

申请日：2017-11-13

Applicant: Cisco Technology, Inc.

Inventor： Johnu George ,  Amit Kumar Saha ,  Arun Saha ,  Debojyoti Dutta

IPC: G06F3/06 ,  G06F12/08

Abstract: Aspects of the subject technology relate to ways to determine the optimal storage of data structures in a hierarchy of memory types. In some aspects, a process of the technology can include steps for determining a latency cost for each of a plurality of fields in an object, identifying at least one field having a latency cost that exceeds a predetermined threshold, and determining whether to store the at least one field to a first memory device or a second memory device based on the latency cost. Systems and machine-readable media are also provided.