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公开(公告)号：US12254838B2
公开(公告)日：2025-03-18
申请号：US18281569
申请日：2022-10-28
Inventor： Yonglin Guo , Zhiliang Jiang , Ming Hu , Ziyang Yu
IPC: G09G3/32 , G09G3/3266 , G11C19/28
Abstract: Provided is a shift register unit. The shift register unit includes: a first input circuit, coupled to a first clock terminal, an input terminal, a first node and a second node; a second input circuit, coupled to the first node, the first clock terminal, a first power terminal and a third node; a first control circuit, coupled to the input terminal, the first clock terminal, the second node, a second power terminal, a second clock terminal and the third node; a second control circuit, coupled to the third node, the second clock terminal, the first node, the first power terminal, the second power terminal, a fourth node and a fifth node; and an output circuit, coupled to the fourth node, the fifth node, the first power terminal, the second power terminal and an output terminal.
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公开(公告)号：US20250087163A1
公开(公告)日：2025-03-13
申请号：US18288412
申请日：2022-12-19
Inventor： Ziyang Yu , Haijun Qiu , Ming Hu , Zhiliang Jiang , Tianyi Cheng , Jianpeng Wu , Erjin Zhao , Mengqi Wang , Wenbo Chen , Cong Liu , Qian Xu
IPC: G09G3/3266 , G09G3/3258
Abstract: A driving circuit includes a driving signal generation circuit, a gating circuit, an output control circuit, an output circuit and a voltage control circuit; the driving signal generation circuit generates an Nth stage of driving signal, the output control circuit connects the first control node and the second node under the control of the potential of the first node; the gating circuit controls to write a gating input signal into the first node under the control of a gating control signal; the voltage control circuit controls a potential of the second node according to a potential of the first node; the output circuit connects the output driving terminal and the first voltage terminal under the control of the potential of the second node, and connects the output driving terminal and the second voltage terminal under the control of the potential of the third control node.
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公开(公告)号：US20250078739A1
公开(公告)日：2025-03-06
申请号：US18287520
申请日：2022-12-19
Inventor： Ziyang Yu , Haijun Qiu , Ming Hu , Zhiliang Jiang , Tianyi Cheng , Jianpeng Wu , Qingqing Yan , Xiangnan Pan , Qing He , Quanyong Gu , Sifei Ai , Junhao Jing , Xiang Luo
IPC: G09G3/3225
Abstract: A driving circuit includes a driving signal generation circuit, a gating circuit, an output control circuit, a voltage control circuit and an output circuit; the driving signal generation circuit generates the Nth stage of driving signal; the gating circuit writes a gating input signal into the first node under the control of a gating control signal; the output control circuit connects the first control node and the second node under the control of a potential of the first node; the voltage control circuit controls a potential of the second node according to the potential of the first node; the output circuit connects the output driving terminal and the first voltage terminal under the control of the potential of the second node, and connects the output driving terminal and the second voltage terminal under the control of the potential of the second control node; N is a positive integer.
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公开(公告)号：US20250021199A1
公开(公告)日：2025-01-16
申请号：US18274204
申请日：2022-07-12
Applicant: BOE Technology Group Co., Ltd.
Inventor： Mengyang Wen , Jianchao Zhu , Guangliang Shang , Xinbin Han , Ziyang Yu , Pan Zhao
IPC: G06F3/044
Abstract: A touch display panel and an electronic product. The touch display panel includes a display substrate, a first conductive layer, a touch insulation layer, a second electrode layer, and a shielding conductive pattern; the display substrate includes a signal line, a first electrode layer and a second electrode layer; the first conductive layer includes a touch conductive structure, which includes touch electrodes, the first electrode layer includes first electrodes, and the second electrode layer includes a plurality of second electrodes; an orthographic projection of the shielding conductive pattern on the base substrate overlaps with that of the signal line and that of at least one of the plurality of touch electrodes respectively, the shielding conductive pattern is located in the first conductive layer and insulated from the touch conductive structure, or the shielding conductive pattern is located in the second electrode layer and insulated from the second electrode.
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公开(公告)号：US20240421164A1
公开(公告)日：2024-12-19
申请号：US18706325
申请日：2023-07-18
Inventor： Mengqi Wang , Ziyang Yu , Zhiliang Jiang , Ming Hu , Fei Chen
Abstract: Disclosed are a display substrate and a display device. In the display substrate, a first power voltage lead is configured to provide a first power voltage and located in the frame region; the first power voltage lead includes a lower lead extending along a portion of the lower edge corresponding to the first edge display region, but does not extend along a portion of the lower edge corresponding to the first middle display region; a first power voltage line includes an edge voltage line located in the first edge display region and a middle voltage line located in the first middle display region; the edge voltage line is directly connected with the lower lead to provide a first power voltage to sub-pixels located in the first edge display region, and the middle voltage line is spaced apart from the lower lead.
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Patent Agency Ranking
公开(公告)号：US12118933B2
公开(公告)日：2024-10-15
申请号：US17515066
申请日：2021-10-29
Inventor： Ziyang Yu
IPC: G09G3/3233
CPC classification number: G09G3/3233 , G09G2310/027 , G09G2310/061 , G09G2320/0238
Abstract: Disclosed are a pixel circuit, a driving method, an electroluminescent display panel and a display apparatus. The pixel circuit includes: a driving control module, a first light emitting control module, a light emitting device and a first capacitor; where the first light emitting control module is coupled between the driving control module and a first electrode of the light emitting device; and the first capacitor is coupled between the light emitting control end and the first electrode of the light emitting device.
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公开(公告)号：US20240274613A1
公开(公告)日：2024-08-15
申请号：US18043304
申请日：2022-06-22
Inventor： Tiaomei Zhang , Haigang Qing , Gukhwan Song , Ziyang Yu , Yunsheng Xiao , Quanyong Gu , Mengqi Wang , Zhengkun Li , De Li , Hong Yi , Wenbo Chen , Zhongliu Yang , Shilong Wang , Pan Zhao
IPC: H01L27/12
CPC classification number: H01L27/124 , H01L27/1222
Abstract: An array substrate is provided. The array substrate includes a plurality of first reset signal lines configured to provide a plurality of first reset signals, a plurality of second reset signal lines configured to provide a plurality of second reset signals, a plurality of third reset signal lines, and a plurality of first connecting lines. A respective first reset signal line is connected to a row of first connecting lines, which in turn are connected to source electrodes of first reset transistors in a row of subpixels, respectively. The plurality of second reset signal lines and the plurality of third reset signal lines form an interconnected reset signal supply network. A respective second reset signal line is connected to one or more of the plurality of third reset signal lines. A respective third reset signal line is connected to one or more of the plurality of second reset signal lines.
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公开(公告)号：US11741896B2
公开(公告)日：2023-08-29
申请号：US17419704
申请日：2020-09-29
Inventor： Ziyang Yu
IPC: G09G3/3233 , G09G3/3266
CPC classification number: G09G3/3233 , G09G3/3266 , G09G2300/0426 , G09G2300/0819 , G09G2300/0842 , G09G2300/0861 , G09G2310/0251 , G09G2310/0286 , G09G2310/08
Abstract: A pixel driving circuit is provided. The pixel driving circuit includes a data write sub-circuit connected to a data line and connected to a second capacitor electrode, the data write sub-circuit configured to write a voltage of a data voltage signal and a threshold voltage of a driving transistor into the second capacitor electrode in a data write phase; a light emitting control sub-circuit connected to the driving transistor, the light emitting control sub-circuit configured to control a voltage supply signal of a voltage supply line to be written into the driving transistor to generate a driving signal in a light emitting phase; and a first reset transistor having a gate electrode connected to a reset control signal line, a source electrode connected to a first reset signal line, and a drain electrode connected to the gate electrode of the driving transistor and the second capacitor electrode.
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公开(公告)号：US20230165059A1
公开(公告)日：2023-05-25
申请号：US18152438
申请日：2023-01-10
IPC: H10K59/121 , H10K59/179
CPC classification number: H10K59/1213 , H10K59/1216 , H10K59/1795
Abstract: A display panel is provided. The display panel includes a base substrate, a plurality of subpixels. A respective subpixel includes a respective light emitting element and a respective pixel driving circuit. The respective pixel driving circuit includes a third transistor; and a storage capacitor including a first capacitor electrode in a first conductive layer and a second capacitor electrode in a second conductor layer. The second conductive layer is on a side of the first conductive layer away from the base substrate. The second capacitor electrode includes an extension extending away from an electrode main body of the second capacitor electrode. An orthographic projection of the extension on the base substrate at least partially overlaps with an orthographic projection of an active layer of the third transistor of the respective pixel driving circuit on the base substrate.
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公开(公告)号：US20220310772A1
公开(公告)日：2022-09-29
申请号：US17456881
申请日：2021-11-29
Inventor： Haigang Qing , Ziyang Yu , Wenbo Chen
IPC: H01L27/32 , G09G3/3266 , G09G3/3225
Abstract: A display substrate includes a base substrate including a display area and a peripheral area located at least on a first side of the display area. A plurality of pixel units are arranged in the display area. A first power trace is located in the peripheral area. A scan driving circuit is located in the peripheral area. The scan driving circuit includes a first scan driving circuit and a second scan driving circuit. A layer where the first power trace is located is located on a side of a layer where the scan driving circuit is located away from the base substrate. An orthographic projection of the first power trace on the base substrate at least partially overlaps an orthographic projection of the first scan driving circuit on the base substrate, and at least partially overlaps an orthographic projection of the second scan driving circuit on the base substrate.
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