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公开(公告)号:US20250087120A1
公开(公告)日:2025-03-13
申请号:US18291636
申请日:2022-08-31
Inventor: Shaofei GUO , Shipeng WANG , Chao TIAN , Dongjia HAO , Jianfeng WANG
Abstract: Embodiments of the present disclosure provide a bracket structure, a sub-display panel module, and a tiled display device. The bracket structure includes a body and at least one transfer motion adjustor. The body has a support surface, an assembly surface, and at least one side surface including a first side surface. The transfer motion adjustor includes: a first rotation member and a first guide member. A first hole is provided on the first side surface, so that a first external jig adjusts the first rotation member to rotate through the end of the first rotation member close to the first side surface and exposed from the first hole. A second hole is provided on the assembly surface, and the first guide member is configured to move along the second hole to adjust a protruding amount of the first guide member on the assembly surface.
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公开(公告)号:US20250084951A1
公开(公告)日:2025-03-13
申请号:US18557593
申请日:2022-10-31
Inventor: Shaofei GUO , Shipeng WANG , Chao TIAN , Jianfeng WANG , Jiaxing YUAN , Jianbai TAN
Abstract: The present disclosure provides a bracket structure. The bracket structure includes a bracket body and at least one transmission adjustment structure, wherein the bracket body includes a supporting portion, an assembly portion and a connecting portion, wherein the supporting portion and the assembly portion are disposed opposite in a first direction, the connecting portion is located between the supporting portion and the assembly portion and the connecting portion has a first side surface; the transmission adjustment structure is located between the supporting portion and the assembly portion, and includes an adjustment member, a transmission member connected with the adjustment member and a response member connected with the transmission member; the adjustment member is located between the supporting portion and the assembly portion and close to the first side surface.
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公开(公告)号:US12230189B2
公开(公告)日:2025-02-18
申请号:US18044311
申请日:2022-04-24
Inventor: Xiuling Li , Qibing Gu , Guofeng Hu , Bao Fu , Wenchieh Huang , Lingyun Shi
IPC: G09G3/32
Abstract: Embodiments of the present disclosure provide an electronic device and a display driving method. The electronic device includes a plurality of device groups and a plurality of driving elements; a first terminal of at least one device group among the plurality of device groups is coupled with a positive signal line, a second terminal of at least one device group among the plurality of device groups is coupled with an output terminal of any one of the plurality of driving elements, and a reference voltage terminal of any one of the plurality of driving elements is configured to be coupled with a reference signal line.
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公开(公告)号:US12159594B2
公开(公告)日:2024-12-03
申请号:US17760266
申请日:2021-11-05
Inventor: Wei Hao , Chinghua Hung , Lingyun Shi , Feifei Wang , Wengang Su , Xingce Shang , Kaimin Yin , Junwei Zhang , Taotao Duan
IPC: G09G3/34
Abstract: A method for generating driving signal is provided. The method includes generating by a first circuit, a first driving signal for a first frame of image, the first driving signal comprising a plurality of first pulse width modulation signals; transmitting the plurality of first pulse width modulation signals to a modulation controller; detecting a vertical synchronization signal; determining whether a most recent first pulse width modulation signal is partially generated when the vertical synchronization signal is detected; and upon determination that the most recent first pulse width modulation signal is partially generated, determining whether to delay generating a second driving signal for a second frame of image.
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公开(公告)号:US20240395988A1
公开(公告)日:2024-11-28
申请号:US18261937
申请日:2022-07-15
Inventor: Lili WANG , Zhonglan ZHAO , Chao LIU , Ming ZHAI , Sha FENG , Qi QI , Jing WANG , Mingming JIA , Heling ZHU
IPC: H01L33/60 , H01L25/075 , H01L33/00 , H01L33/62
Abstract: A display panel includes a substrate, a light-blocking layer, a plurality of connection leads and a light-emitting device layer. The substrate includes a first surface and a second surface opposite to each other, and a plurality of side surfaces connecting the first surface and the second surface. At least one of the plurality of side surfaces is a selected side surface. The light-emitting device layer is disposed on the second surface. Each of the plurality of connection leads includes a first portion located on the first surface of the substrate, a second portion located on the selected side surface of the substrate and a third portion located on the second surface of the substrate. The light-blocking layer is located between the plurality of connection leads and the substrate, and is at least located between first portions of the plurality of connection leads and the first surface of the substrate.
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公开(公告)号:US20240395853A1
公开(公告)日:2024-11-28
申请号:US18661716
申请日:2024-05-13
Applicant: BOE MLED Technology Co., Ltd. , BOE TECHNOLOGY GROUP CO., LTD. , BEIJING BOE TECHNOLOGY DEVELOPMENT CO., LTD.
Inventor: Chao LIU , Jing WANG , Lili WANG , Shanshan FENG , Jingping ZHAO , Mingming JIA , Sha FENG , Mengqing LIU , Huaimin WANG , Ming ZHAI , Haiwei SUN , Qi QI
IPC: H01L27/15
Abstract: A driving substrate includes: a base substrate including first and second surfaces and side surfaces, at least one side surface being a selected side surface; a flexible film including a first region located on the first surface, a second region located on the second surface, and a bending region located between the first and second regions, the bending region including a first corner region, a second corner region and a side region; and a wiring layer, an electrode layer and a connection lead layer disposed in sequence on a side of the flexible film away from the base substrate. The wiring layer is located in the first region, the second region and the side region. The electrode layer includes first, second, third, and fourth electrodes. Each third electrode is electrically connected to a fourth electrode through the wiring layer. The connection lead layer includes first and second connection leads.
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公开(公告)号:US20240377677A1
公开(公告)日:2024-11-14
申请号:US18249553
申请日:2022-03-28
Inventor: Pei QIN , Yutao HAO , Hao ZHOU , Donglei LI , Ying CHEN , Honghao YU , Jie GAO , Jiaxin LI , Jingran NIU , Jinpeng LI
IPC: G02F1/13357 , G02F1/1335 , H01L25/16 , H01L33/60
Abstract: A light-emitting substrate includes a substrate and a plurality of light-emitting assemblies. The plurality of light-emitting assemblies are located on a side of the substrate. At least one light-emitting assembly includes a light-emitting element and a light adjustment portion arranged around the light-emitting element. The light adjustment portion includes a plurality of sub-structures spaced apart from each other. In any two sub-structures in the light adjustment portion in any direction away from the light-emitting element, a height of a sub-structure closer to the light-emitting element is less than a height of a sub-structure farther from the light-emitting element.
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公开(公告)号:US20240346995A1
公开(公告)日:2024-10-17
申请号:US18756624
申请日:2024-06-27
Inventor: Xiuling LI , Qibing GU , Guofeng HU , Hongge MEI , Nana GAO , Bao FU , Xiangyi CHEN , Lingyun SHI , Wenchieh HUANG
IPC: G09G3/32
CPC classification number: G09G3/32 , G09G2300/0452 , G09G2310/0202 , G09G2310/08
Abstract: An array substrate and a driving method therefor, and a display apparatus are disclosed. The array substrate includes: a base substrate; and a plurality of pixels located on the base substrate, where the plurality of pixels are arranged in an array in a first direction and a second direction. At least one pixel of the plurality of pixels includes: sub-pixels, and a pixel driving chip for driving each sub-pixel in the pixel. The array substrate further includes: a plurality of addressing signal lines located on the base substrate, where the addressing signal lines are coupled to addressing signal ends of pixel driving chips of a row of the pixels arranged in the first direction; and a plurality of data lines located on the base substrate, where the data lines are coupled to data signal ends of pixel driving chips of a column of the pixels arranged in the second direction.
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公开(公告)号:US12095011B2
公开(公告)日:2024-09-17
申请号:US17434712
申请日:2021-01-04
Inventor: Enkai Dong , Haiwei Sun , Pei Li , Ming Zhai , Jian Sang , Lu Yu , Chao Liu
CPC classification number: H01L33/46 , H01L25/0753 , H01L33/56 , H01L33/58 , H01L33/62
Abstract: A display substrate includes a base substrate, a plurality of light-emitting units, a protecting layer and a connecting line. The base substrate is a transparent substrate, and the plurality of light-emitting units, the protecting layer and the connecting line are laminated in sequence along a direction distal from the base substrate. A via is arranged in the protecting layer, one end of the connecting line is connected to the plurality of light-emitting units through the via, and the other end of the connecting line is configured to connect to a driving circuit of a display apparatus.
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公开(公告)号:US20240297283A1
公开(公告)日:2024-09-05
申请号:US18027553
申请日:2022-03-31
Inventor: Yuanda Lu , Jiawei Zhao , Zhijun Xiong , Shanwei Yang , Xueqiao Li , Yuanhao Sun , Junjie Ma
IPC: H01L33/62 , H01L25/075
CPC classification number: H01L33/62 , H01L25/0753
Abstract: Provided is a light emitting diode chip, including: a base substrate; at least two light emitting units disposed on the base substrate, wherein the at least two light emitting units include adjacent first light emitting unit and second light emitting unit, and each of the first light emitting unit and the second light emitting unit includes: a first semiconductor layer disposed on the base substrate; a light emitting layer disposed on the first semiconductor layer away from the base substrate; and a second semiconductor layer disposed on the light emitting layer away from the base substrate, wherein the light emitting diode chip further includes a bridging part for conducting, and the bridging part is configured to electrically connect the second semiconductor layer of the first light emitting unit with the first semiconductor layer of the second light emitting unit.
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