公开(公告)号：US09884758B2

公开(公告)日：2018-02-06

申请号：US15182754

申请日：2016-06-15

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Shyh-Wei Cheng ,  Hsi-Cheng Hsu ,  Hsin-Yu Chen ,  Ji-Hong Chiang ,  Jui-Chun Weng ,  Wei-Ding Wu ,  Yu-Jui Wu ,  Ching-Hsiang Hu ,  Ming-Tsung Chen

IPC: H01L21/00 ,  B81C1/00 ,  B81B7/00

CPC classification number: B81C1/00285 ,  B81B7/0038 ,  B81B2201/0235 ,  B81B2201/0242 ,  B81B2207/012 ,  B81B2207/07 ,  B81C2203/0118 ,  B81C2203/0792

Abstract: The present disclosure relates to a MEMS package having an outgassing element configured to adjust a pressure within a hermetically sealed cavity by inducing outgassing of into the cavity, and an associated method. In some embodiments, the method is performed by forming an outgassing element within a passivation layer over a CMOS substrate and forming an outgassing resistive layer to cover the outgassing element. The outgassing resistive layer is removed from over the outgassing element, and the MEMS substrate is bonded to a front side of the CMOS substrate to enclose a first MEMS device within a first cavity and a second MEMS device within a second cavity. After removing the outgassing resistive layer, the outgassing element releases a gas into the second cavity to increase a second pressure of the second cavity to be greater than a first pressure of the first cavity.

公开(公告)号：US20170107097A1

公开(公告)日：2017-04-20

申请号：US14980297

申请日：2015-12-28

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Shyh-Wei Cheng ,  Chih-Yu Wang ,  Hsi-Cheng Hsu ,  Ji-Hong Chiang ,  Jui-Chun Weng ,  Shiuan-Jeng Lin ,  Wei-Ding Wu ,  Ching-Hsiang Hu

IPC: B81B7/00 ,  B81C1/00

CPC classification number: B81B7/007 ,  B81B7/0006 ,  B81B2207/012 ,  B81B2207/096 ,  B81C1/00238 ,  B81C1/00301 ,  B81C2201/013 ,  B81C2203/0109 ,  B81C2203/0118 ,  B81C2203/037 ,  B81C2203/0792

Abstract: The present disclosure relates to micro-electromechanical system (MEMS) package that uses polysilicon inter-tier connections to provide for a low parasitic capacitance in MEM device signals, and a method of formation. In some embodiments, the MEMS package has a CMOS substrate with one or more semiconductor devices arranged within a semiconductor body. A MEMS substrate having an ambulatory element is connected to the CMOS substrate by a conductive bonding structure. The conductive bonding structure is arranged on a front-side of the MEMS substrate at a location laterally offset from the ambulatory element. One or more polysilicon vias extend through the conductive MEMS substrate to the bonding structure. The one or more polysilicon vias are configured to electrically couple the MEMS substrate to the CMOS substrate. By connecting the MEMS substrate to the CMOS substrate using the polysilicon vias, the parasitic capacitance and form factor of the MEMS package are reduced.