公开(公告)号：US20170176850A1

公开(公告)日：2017-06-22

申请号：US14973562

申请日：2015-12-17

Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.

Inventor： Amö Chen ,  Yun-Yue Lin ,  Ta-Cheng Lien ,  Hsin-Chang Lee ,  Chih-Cheng Lin ,  JENG-HORNG CHEN

IPC: G03F1/64 ,  G03F1/22 ,  G03F7/20

CPC classification number: G03F1/64 ,  G03F1/22 ,  G03F7/20

Abstract: The present disclosure provides an apparatus for a semiconductor lithography process in accordance with some embodiments. The apparatus includes a pellicle membrane with a thermal conductive surface; a porous pellicle frame; and a thermal conductive adhesive layer that secures the pellicle membrane to the porous pellicle frame. The porous pellicle frame includes a plurality of pore channels continuously extending from an exterior surface of the porous pellicle frame to an interior surface of the porous pellicle frame.